Lien Release Agreement between Irvine Sensors Corporation and Investor (March 18, 2009)
This agreement is between Irvine Sensors Corporation and an investor, addressing the release of the investor's security interest (liens) in certain patent assets. The release is contingent on the investor receiving either cash, company shares, or a combination, as payment for amounts owed under a promissory note, following the sale of the company's patent portfolio. The agreement also covers procedures for issuing shares, escrow arrangements, and legal provisions such as governing law and dispute resolution. The agreement ensures the investor's liens are released to facilitate the patent sale.
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a Delaware corporation
By: | ||
John Carson, President and Chief Executive Officer | ||
Address: | ||
By: | ||
Name: | ||
Title: | ||
Address: | ||
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Secured | Execution | Recordation | ||||||
Debtor | Party | Date | Reel/Frame | Date | ||||
Irvine Sensors Corporation |
Name: | ||
Address: | ||
(If Applicable)
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
5,235,672 (07/651,477) | US | 8/10/1993 (2/6/1991) | Hardware for electronic neural network | |||
Carson, John C. | ||||||
6,389,404 (09/223,476) | US | 5/14/2002 (12/30/1998) | Neural processing module with input architectures that make maximal use of a weighted synapse array | |||
Carson, John C.; Saunders, Christ H. | ||||||
6,650,704 (09/427,384) | US | 11/18/2003 (10/25/1999) | Method of producing a high quality, high resolution image from a sequence of low quality, low resolution images that are undersampled and subject to jitter | |||
Carlson, Randolph S.; Arnold, Jack L.; Feldmus, Valentine G. | ||||||
6,829,237 (09/973,857) | US | 12/7/2004 (10/9/2001) | High speed multi-stage switching network formed from stacked switching layers Carson, John C.; Ozguz, Volkan H. | |||
7,082,591 (10/346,363) | US | 7/25/2006 (1/17/2003) | Method for effectively embedding various integrated circuits within field programmable gate arrays | |||
Carlson, Randolph S. | ||||||
6,856,167 (10/347,038) | US | 2/15/2005 (1/17/2003) | Field programmable gate array with a variably wide word width memory | |||
Ozguz, Volkan H.; Carlson, Randolph S.; Gann, Keith D.; Leon, John P. | ||||||
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
7,265,579 (11/037,490) | US | 9/4/2007 (1/18/2005) | Field programmable gate array incorporating dedicated memory stacks | |||
Carlson, Randolph Stuart; Ozguz, Volkan; Gann, Keith D.; Leon, John P. | ||||||
5,508,836 (08/305,066) | US | 4/16/1996 (9/13/1994) | Infrared wireless communication between electronic system components DeCaro, Robert; Saunders, Christ H.; Maeding, Dale | |||
5,635,705 (08/526,415) | US | 6/3/1997 (9/11/1995) | Sensing and selecting observed events for signal processing | |||
Saunders, Christ H. | ||||||
6,195,268 (09/031,435) | US | 2/27/2001 (2/26/1998) | Stacking layers containing enclosed IC chips | |||
Eide, Floyd K. | ||||||
5,045,685 (07/534,969) | US | 9/3/1991 (6/6/1990) | Analog to digital conversion on multiple channel IC chips | |||
Wall, Llewellyn E. | ||||||
5,104,820 (07/720,025) | US | 4/14/1992 (6/24/1991) | Method of fabricating electronic circuitry unit containing stacked IC layers having lead rerouting | |||
Go, Tiong C.(deceased,); Minahan, Joseph A.; Shanken, Stuart N. | ||||||
5,279,991 (07/996,794) | US | 1/18/1994 (12/24/1992) | Method for fabricating stacks of IC chips by segmenting a larger stack | |||
Minahan, Joseph A.; Pepe, Angel A. |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
5,432,318 (08/178,923) | US | 7/11/1995 (1/7/1994) | Apparatus for segmenting stacked IC chips | |||
Minahan, Joseph A. | ||||||
5,304,790 (07/956,914) | US | 4/19/1994 (10/5/1992) | Apparatus and system for controllably varying image resolution to reduce data output | |||
Arnold, Jack | ||||||
5,347,428 (07/985,837) | US | 9/13/1994 (12/3/1992) | Module comprising IC memory stack dedicated to and structurally combined with an IC microprocessor chip | |||
Carson, John C.; Indin, Ronald J.; Shanken, Stuart N. | ||||||
5,406,701 (08/120,675) | US | 4/18/1995 (9/13/1993) | Fabrication of dense parallel solder bump connections | |||
Pepe, Angel A.; Reinker, David M.; Minahan, Joseph A. | ||||||
5,424,920 (08/232,739) | US | 6/13/1995 (4/25/1994) | Non-conductive end layer for integrated stack of IC chips | |||
Miyake, Michael K. | ||||||
5,432,729 (08/255,465) | US | 7/11/1995 (6/8/1994) | Electronic module comprising a stack of IC chips each interacting with an IC chip secured to the stack | |||
Carson, John C.; Some, Raphael R. | ||||||
5,581,498 (08/326,645) | US | 12/3/1996 (10/20/1994) | Stack of IC chips in lieu of single IC chip | |||
Ludwig, David E.; Saunders, Christ H.; Some, Raphael R.; Stuart, John J. |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
5,688,721 (08/62,2671) | US | 11/18/1997 (3/26/1996) | 3D stack of IC chips having leads reached by vias through passivation covering access plane | |||
Johnson, Tony K. | ||||||
5,953,588 (08/777,747) | US | 9/14/1999 (12/21/1996) | Stackable layers containing encapsulated IC chips | |||
Camien, Andrew N; Yamaguchi, James S. | ||||||
6,072,234 (09/316,740) | US | 6/6/2000 (5/21/1999) | Stack of equal layer neo-chips containing encapsulated IC chips of different sizes | |||
Camien, Andrew N.; Yamaguchi, James S. | ||||||
5,955,668 (09/166,458) | US | 9/21/1999 (10/5/1998) | Multi-element micro gyro | |||
Hsu, Ying W.; Reeds, III, John W.; Saunders, Christ H. | ||||||
6,089,089 (09/301,847) | US | 7/18/2000 (4/29/1999) | Multi-element micro gyro Hsu, Ying W. | |||
6,578,420 (09/604,782) | US | 6/17/2003 (6/26/2000) | Multi-axis micro gyro structure | |||
Hsu, Ying Wen | ||||||
6,014,316 (09/095,416) | US | 1/11/2000 (6/10/1998) | IC stack utilizing BGA contacts | |||
Eide, Floyd K. | ||||||
6,028,352 (09/095,415) | US | 2/22/2000 (6/10/1998) | IC stack utilizing secondary leadframes Eide, Floyd K. | |||
6,117,704 (09/282,704) | US | 9/12/2000 (3/31/1999) | Stackable layers containing encapsulated chips |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
Yamaguchi, James S.; Ozguz, Volkan H.; Camien, Andrew N. | ||||||
6,476,392 (09/853,819) | US | 11/5/2002 (5/11/2001) | Method and apparatus for temperature compensation of an uncooled focal plane array | |||
Kaufman, Charles S.; Carson, Randolph S.; Hornback, William B. | ||||||
6,891,160 (10/281,393) | US | 5/10/2005 (10/25/2002) | Method and apparatus for temperature compensation of an uncooled focal plane array | |||
Kaufman, Charles S.; Carson, Randolph S.; Hornback, William B. | ||||||
7,235,785 (11/048,634) | US | 6/26/2007 (1/31/2005) | Imaging device with multiple fields of view incorporating memory-based temperature compensation of an uncooled focal plane array | |||
Hornback, Bert; Harwood, Doug; Boyd, W. Eric; Carlson, Randy | ||||||
6,596,997 (09/921,525) | US | 7/22/2003 (8/3/2001) | Retro-reflector warm stop for uncooled thermal imaging cameras and method of using the same | |||
Kaufman, Charles S. | ||||||
6,706,971 (10/142,557) | US | 3/16/2004 (5/10/2002) | Stackable microcircuit layer formed from a plastic encapsulated microcircuit | |||
Albert, Douglas M.; Gann, Keith D. | ||||||
7,174,627 (10/338,974) | US | 2/13/2007 (1/9/2003) | Method of fabricating known good dies from packaged integrated circuits |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
Gann, Keith D. | ||||||
6,560,109 (09/949,024) | US | 5/6/2003 (9/7/2001) | Stack of multilayer modules with heat-focusing metal layer | |||
Yamaguchi, James Satsuo; Pepe, Angel Antonio; Ozguz, Volkan H.; Camien, Andrew Nelson | ||||||
6,717,061 (09/949,512) | US | 4/6/2004 (9/7/2001) | Stacking of multilayer modules | |||
Yamaguchi, James Satsuo; Pepe, Angel Antonio; Ozguz, Volkan H.; Camien, Andrew Nelson | ||||||
6,734,370 (09/948,950) | US | 5/11/2004 (9/7/2001) | Multilayer modules with flexible substrates | |||
Yamaguchi, James Satsuo; Pepe, Angel Antonio; Ozguz, Volkan H.; Camien, Andrew Nelson | ||||||
7,127,807 (10/431,914) | US | 10/31/2006 (5/7/2003) | Process of manufacturing multilayer modules | |||
Yamaguchi, James Satsuo; Pepe, Angel Antonio; Ozguz, Volkan H.; Camien, Andrew Nelson | ||||||
6,797,537 (09/938,686) | US | 9/28/2004 (10/30/2001) | Method of making stackable layers containing encapsulated integrated circuit chips with one or more overlaying interconnect layers | |||
Pepe, Angel Antonio; Yamaguchi, James Satsuo | ||||||
6,784,547 (10/302,680) | US | 8/31/2004 (11/21/2002) | Stackable layers containing encapsulated integrated circuit chips with one or more |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
overlying interconnect layers | ||||||
Pepe, Angel Antonio; Yamaguchi, James Satsuo | ||||||
7,239,012 (10/951,990) | US | 7/3/2007 (9/28/2004) | Three-dimensional module comprised of layers containing IC chips with overlying interconnect layers | |||
Pepe, Angel; Yamaguchi, James | ||||||
6,806,559 (10/128,728) | US | 10/19/2004 (4/22/2002) | Method and apparatus for connecting vertically stacked integrated circuit chips Gann, Keith D.; Albert, Douglas M. | |||
6,912,862 (10/615,641) | US | 7/5/2005 (7/8/2003) | Cryopump piston position tracking Sapir, Itzhak | |||
6,967,411 (10/360,244) | US | 11/22/2005 (2/7/2003) | Stackable layers containing ball grid array packages Eide, Floyd K. | |||
7,242,082 (11/229,351) | US | 6/10/2007 (9/15/2005) | Stackable layer containing ball grid array package Eide, Floyd | |||
6,993,835 (10/726,888) | US | 2/7/2006 (12/4/2003) | Method for electrical interconnection of angularly disposed conductive patterns Albert, Douglas Marice | |||
6,998,328 (10/701,783) | US | 2/14/2006 (11/5/2003) | Method for creating neo-wafers from singulated integrated circuit die and a device made according to the method Stern, Jonathan Michael |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
7,417,323 (10/703,177) | US | (11/6/2003) | Neo-wafer device and method Sambo S. He | |||
7,198,965 (11/354,370) | US | 4/3/2007 (2/14/2006) | Method for making a neo-layer comprising embedded discrete components | |||
He, Sambo | ||||||
7,180,579 (10/806,037) | US | 2/20/2007 (3/22/2004) | Three-dimensional imaging processing module incorporating stacked layers containing microelectronic circuits | |||
Ludwig, David E.; Kennedy, John V.; Kleinhans, William; Liu, Tina; Krutzik, Christian | ||||||
7,436,494 (11/706,724) | US | 10/14/2008 (2/15/2007) | Three-dimensional lanar module with alignment refernce insert circuitry Ludwig, David E.; Kennedy, John V.; Kleinhans, William; Liu, Tina; Krutzik, Christian | |||
7,335,576 (11/197,828) | US | 2/26/2008 (8/5/2005) | Method for precision integrated circuit die singulation using differential etch rates | |||
David, Ludwig; Yamaguchi, James; Clark, Stuart; Boyd, W. Eric | ||||||
7,380,459 (11/654,292) | US | 6/3/2008 (1/16/2007) | Absolute pressure sensor | |||
Sapir, Itzhak | ||||||
09/949,203 | US | 9/7/2001 | Method of manufacturing multilayer modules | |||
James Satsuo Yamaguchi; Angel Antonio Pepe; Volkan |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
H. Ozguz; Andrew Nelson Camien | ||||||
10/968,572 | US | 10/19/2004 | Vertically stacked pre-packaged integrated circuit chips | |||
Keith Gann; Douglas N. Albert | ||||||
7,440,449 (10/960,712) | US | 10/6/2004 | High speed switching module comprised of stacked layers incorporating T-connect structures | |||
John C. Carson; Volkan H. Orguz | ||||||
11/977,447 | US | Inventorship not available | ||||
11/897,938 | US | Inventorship not available | ||||
11/825,643 | US | 7/7/2007 | Inventorship not available | |||
11/807,671 | US | Inventorship not available | ||||
11/731,154 | US | Inventorship not available | ||||
11/644,438 | US | 12/22/2006 | Method for making stacked integrated circuits (ICs) using prepackaged parts | |||
Keith D. Gann | ||||||
11/524,090 | US | 9/20/2006 | Stackable tier structure comprising high density feedthrough | |||
Volkan Ozguz; Jonathan Stern | ||||||
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
11/511117 | US | 8/26/2006 | MEMS cooling device | |||
Itzhak Sapir | ||||||
11/499,403 | US | 8/4/2006 | High density interconnect assembly comprising stacked electronic module | |||
John V. Kennedy | ||||||
11/441908 | US | 5/26/2006 | Stackable tier structure comprising prefabricated high density feedthrough | |||
Volkan Ozguz; Jonathan Stern | ||||||
11/429,468 | US | Inventorship not available | ||||
11/415,891 | US | 5/1/2006 | Low power electronic circuit incorporating real time clock | |||
Gary Gottlieb | ||||||
10/339,023 | US | 1/9/2003 | Method for making stacked integrated circuits (ICs) using prepackaged parts Keith D. Gann | |||
11/350,974 | US | 2/8/2006 | Stacked ball grid array package module utilizing one or more interposer layers | |||
William E. Boyd; Daniel Michaels | ||||||
11/302,480 | US | 12/12/2005 | Neo-wafer device comprised of multiple singulated integrated circuit die | |||
Stern Jonathan | ||||||
11/301645 | US | 12/12/2005 | Cornerbond assembly comprising three-dimensional electronic modules |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
Albert Douglas | ||||||
11/259,683 | US | 10/25/2005 | Stacked microelectronic layer and module with three-axis channel T-connects | |||
Keith D. Gann; W. Eric Boyd | ||||||
11/248,659 | US | 10/11/2005 | Anti-tamper module | |||
Volkan H. Ozguz; John Leon | ||||||
10/178,390 | US | 6/24/2002 | Video event capture, storage and processing method and apparatus | |||
Randolph S. Carlson | ||||||
60/993,689 | US | Inventorship not available | ||||
11/150712 | US | 6/10/2005 | Stackable semiconductor chip layer comprising prefabricated trench interconnect vias | |||
W. Eric Boyd; Angel Pepe; James Yamaguchi; Volkan Ozguz; Andrew Camien; Douglas Albert | ||||||
11/062,507 | US | 2/22/2005 | BGA-scale stacks comprised of layers containing integrated circuit die and a method for making the same | |||
Gann Keith; William E. Boyd | ||||||
12/008,253 | US | Inventorship not available | ||||
61/007,497 | US | Inventorship not available |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
TR1596433 (TR04394026.1) | TR | 1/2/2008 (5/12/2004) | A method for creating neo-wafers from singulated integrated circuit die and a device made according to the method | |||
Stern, Jonathan Michael | ||||||
SK1596433 (SK04394026.1) | SK | 1/2/2008 (5/12/2004) | A method for creating neo-wafers from singulated integrated circuit die and a device made according to the method | |||
Stern, Jonathan Michael | ||||||
SE0570479 (SE92905662.0) | SE | 10/10/2001 (1/29/1992) | Hardware for electronic neural network | |||
Carson, John C. | ||||||
SE83902618.4 | SE | 7/25/1983 | Multiplexer circuitry for high density analog signals Inventorship not available | |||
NL0570479 (NL92905662.0) | NL | 10/10/2001 (1/29/1992) | Hardware for electronic neural network | |||
Carson, John C. | ||||||
NL83902618.4 | NL | 7/25/1983 | Multiplexer circuitry for high density analog signals Inventorship not available | |||
JP2098125 (JP12-505387) | JP | 11/20/1985 | Apparatus and method for fabricating modules Inventorship not available | |||
JP2098125 (JP12 ###-###-####) | JP | 10/20/1987 | High-density electronic modules, process and product |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
Inventorship not available | ||||||
JP2005-507894 | JP | 1/16/2006 | Stackable layers containing ball grid array packages Inventorship not available | |||
JP2006-286556 | JP | 10/20/2006 | Stackable tier structure comprising high density feedthrough Volkan Ozguz; Jonathan Stern | |||
JP2000-591490 | JP | 12/30/1999 | Neural processing module with input architectures that make maximal use of a weighted synapse array Carson, John C.; Saunders, Christ H. | |||
JP3308265 (JP12-554175) | JP | 6/10/1999 | IC stack utilizing flexible circuits with BGA contacts Eide, Floyd K. | |||
JP3511008 (JP12-553982) | JP | 6/10/1999 | IC stack utilizing secondary leadframes Eide, Floyd K. | |||
JP3544974 (JP06-0502691) | JP | 5/5/1993 | Non-conductive end layer for integrated stack of IC chips Miyake, Michael K. | |||
JP3354937 (JP06-524367) | JP | 4/19/1994 | Electronic module comprising a stack of IC chips Carson, John C.; Some, Raphael R. | |||
IT1097467 (IT99928571.1) | IT | 11/2/2006 (6/10/1993) | IC stack utilizing secondary leadframes Eide, Floyd K. |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
IT1596433 (IT04394026.1) | IT | 1/2/2008 (5/12/2004) | A method for creating neo-wafers from singulated integrated circuit die and a device made according to the method Stern, Jonathan Michael | |||
IE1596433 (IE04394026.1) | IE | 1/2/2008 (5/12/2004) | A method for creating neo-wafers from singulated integrated circuit die and a device made according to the method Stern, Jonathan Michael | |||
GB0570479 (GB92905662.0) | GB | 10/10/2001 (1/29/1992) | Hardware for electronic neural network Carson, John C. | |||
GB1097467 (GB99928571.1) | GB | 11/2/2006 (6/10/1993) | IC stack utilizing secondary leadframes Eide, Floyd K. | |||
GB1596433 (GB04394026.1) | GB | 1/2/2008 (5/12/2004) | A method for creating neo-wafers from singulated integrated circuit die and a device made according to the method Stern, Jonathan Michael | |||
GB83902618.4 | GB | 7/25/1983 | Multiplexer circuitry for high density analog signals Inventorship not available | |||
GB05996075 (GB93911250.4) | GB | 8/22/2001 (5/5/1993) | Non-conductive end layer for integrated stack of IC chips Miyake, Michael K. | |||
GB0683968 (GB94903352.6) | GB | 10/24/2002 (12/1/1993) | Module comprising IC memory stack dedicated to and structurally combined with an |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
IC microprocessor chip Carson, John C.; Indin, Ronald J.; Shanken, Stuart N. | ||||||
GB0695494 (GB94915397.7) | GB | 2/24/2001 (4/19/1994) | Electronic module comprising a stack of IC chips Carson, John C.; Some, Raphael R. | |||
GB0713609 (GB94925876.8) | GB | 5/7/2003 (8/12/1994) | Stack of IC chips as substitute for single IC chip Ludwig, David E.; Saunders, Christ H.; Some, Raphael R.; Stuart, John J. | |||
GB067087 (GB94909418.9) | GB | (12/16/1993) | Fabricating stacks of ic chips by segmenting a larger stack MINIHAN JOSEPH A; PEPE ANGEL A | |||
FR1097467 (FR99928571.1) | FR | 11/2/2006 (6/10/1993) | IC stack utilizing secondary leadframes Eide, Floyd K. | |||
FR1596433 (FR04394026.1) | FR | 1/2/2008 (5/12/2004) | A method for creating neo-wafers from singulated integrated circuit die and a device made according to the method Stern, Jonathan Michael | |||
FR83902618.4 | FR | 7/25/1983 | Multiplexer circuitry for high density analog signals Inventorship not available | |||
FR05996075 (FR93911250.4) | FR | 8/22/2001 (5/5/1993) | Non-conductive end layer for integrated stack of IC chips Miyake, Michael K. | |||
FR0683968 | FR | 10/24/2002 | Module comprising IC |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
(FR94903352.6) | (12/1/1993) | memory stack dedicated to and structurally combined with an IC microprocessor chip Carson, John C.; Indin, Ronald J.; Shanken, Stuart N. | ||||
FR0695494 (FR94915397.7) | FR | 2/24/2001 (4/19/1994) | Electronic module comprising a stack of IC chips Carson, John C.; Some, Raphael R. | |||
FR0713609 (FR94925876.8) | FR | 5/7/2003 (8/12/1994) | Stack of IC chips as substitute for single IC chip Ludwig, David E.; Saunders, Christ H.; Some, Raphael R.; Stuart, John J. | |||
EP02705988.0 | EP | 1/25/2002 | A stackable microcircuit layer formed from a plastic encapsulated microcircuit and method of making the same Albert, Douglas M.; Gann, Keith D. | |||
EP06255467.0 | EP | 10/24/2006 | Stackable tier structure comprising high density feedthrough Volkan Ozguz; Jonathan Stern | |||
EP1097467 (EP99928571.1) | EP | 11/2/2006 (6/10/1993) | IC stack utilizing secondary leadframes Eide, Floyd K. | |||
EP1596433 (EP04394026.1) | EP | 1/2/2008 (5/12/2004) | A method for creating neo-wafers from singulated integrated circuit die and a device made according to the method Stern, Jonathan Michael | |||
EP03818224.2 | EP | 08/8/203 | Stackable layers containing |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
ball grid array packages Eide, Floyd K. | ||||||
EP99967712.3 | EP | 12/30/1999 | Neural processing module with input architectures that make maximal use of a weighted synapse array Carson, John C.; Saunders, Christ H. | |||
EP99928570.3 | EP | 6/10/1993 | IC stack utilizing flexible circuits with BGA contacts Eide, Floyd K. | |||
EP02805694.3 | EP | 7/16/2002 | Wearable biomonitor with flexible thinned integrated circuit Ogzuz, Volkhan H; Khashayar, Abbas | |||
EP05996075 (EP93911250.4) | EP | 8/22/2001 (5/5/1993) | Non-conductive end layer for integrated stack of IC chips Miyake, Michael K. | |||
EP02789292.6 | EP | 10/25/2002 | Stackable layers containing encapsulated integrated circuit chips with one or more overlying interconnect layers and a method of making the same Pepe, Angel Antonio; Yamaguchi, James Satsuo | |||
EP02798173.7 | EP | 9/9/2002 | Stacking of multilayer modules Yamaguchi, James Satsuo; Pepe, Angel Antonio; Ozguz, Volkan H.; Camien, Andrew Nelson | |||
EP05111589.7 | EP | 12/1/2005 | BGA-scale stacks comprised |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
of layers containing integrated circuit die and a method for making the same Gann Keith; William E. Boyd | ||||||
EP95935157.8 | EP | 9/27/1995 | Infrared wireless communication between electronic system components DeCaro, Robert; Saunders, Christ H.; Maeding, Dale | |||
EP03721978.9 | EP | 4/22/2003 | Method and apparatus for connecting vertically stacked integrated circuit chips Gann, Keith D.; Albert, Douglas M. | |||
DE69232116 (DE69232116) | DE | 10/10/2001 (1/29/1992) | Hardware for electronic neural network Carson, John C. | |||
DE69330630 (DE69330630) | DE | 8/22/2001 (5/5/1993) | Non-conductive end layer for integrated stack of IC chips Miyake, Michael K. | |||
DE69426695 (DE69426695) | DE | 2/24/2001 (4/19/1994) | Electronic module comprising a stack of IC chips Carson, John C.; Some, Raphael R. | |||
DE60200401 (DE60200401) | DE | 1/2/2008 (5/12/2004) | A method for creating neo-wafers from singulated integrated circuit die and a device made according to the method Stern, Jonathan Michael | |||
DE83902618.4 | DE | 7/25/1983 | Multiplexer circuitry for high density analog signals |
Title of Patent and First | ||||||
Patent or Application No. | Country | Filing Date | Named Inventor | |||
Inventorship not available | ||||||
PCT/US00/029448 | WO | 10/25/2000 | SYSTEM AND METHODS FOR PRODUCING HIGH RESOLUTION IMAGES FROM A VIDEO SEQUENCE OF LOWER RESOLUTION IMAGES CARLSON RANDOLPH S; ARNOLD JACK L; FELDMUS VALENTIN G | |||
PCT/US92/005348 | WO | 6/24/1992 | Fabricating electronic circuitry unit containing stacked IC layers having lead rerouting Go, Tiong C.(deceased,); Minahan, Joseph A.; Shanken, Stuart N. | |||
PCT/US03/004462 | WO | 5/5/1993 | Non-conductive end layer for integrated stack of IC chips Miyake, Michael K. | |||
PCT/US99/013171 | WO | 6/10/1999 | IC stack utilizing flexible circuits with BGA contacts Eide, Floyd K. | |||
PCT/US06/008920 | WO | 3/10/2006 | Method for making a neo-layer comprising embedded discrete components He, Sambo | |||
PCT/US06/039915 | WO | 8/26/2006 | MEMS cooling device Itzhak Sapir | |||
PCT/US01/031583 | WO | 10/9/2001 | High speed switching module comprised of stacked layers incorporating T-connect structures John C. Carson; Volkan H. Orguz | |||
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Title of Patent and First | ||||||
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PCT/US02/006848 | WO | 3/4/2002 | Retro-reflector warm stop for uncooled thermal imaging cameras and method of using the same Kaufman, Charles S. | |||
PCT/US02/022617 | WO | 7/16/2002 | Wearable biomonitor with flexible thinned integrated circuit Ogzuz, Volkhan H; Khashayar, Abbas | |||
PCT/US02/028628 | WO | 9/9/2002 | Stacking of multilayer modules Yamaguchi, James Satsuo; Pepe, Angel Antonio; Ozguz, Volkan H.; Camien, Andrew Nelson | |||
PCT/US02/034339 | WO | 10/25/2002 | Stackable layers containing encapsulated integrated circuit chips with one or more overlying interconnect layers and a method of making the same Pepe, Angel Antonio; Yamaguchi, James Satsuo | |||
PCT/US02/19779 | WO | 6/24/2002 | Video event capture, storage and processing method and apparatus Randolph S. Carlson | |||
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PCT/US03/013569 | WO | 4/22/2003 | Method and apparatus for connecting vertically stacked integrated circuit chips Gann, Keith D.; Albert, Douglas M. | |||
Title of Patent and First | ||||||
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PCT/US03/024706 | WO | 08/08/2003 | Stackable layers containing ball grid array packages Eide, Floyd K. | |||
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PCT/US88/003084 | WO | 9/8/1988 | Bonding of aligned conductive bumps on adjacent surfaces Go, Tiong C. | |||
PCT/US92/000780 | WO | 1/29/1992 | Hardware for electronic neural network Carson, John C. | |||
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PCT/US93/009470 | WO | 10/5/1993 | Apparatus and system for controllably varying image resolution to reduce data output Arnold, Jack | |||
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Title of Patent and First | ||||||
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PCT/US95/012378 | WO | 9/27/1995 | Infrared wireless communication between electronic system components DeCaro, Robert; Saunders, Christ H.; Maeding, Dale | |||
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PCT/US96/014610 | WO | 9/11/1996 | SENSING AND SELECTING OBSERVED EVENTS FOR SIGNAL PROCESSING SAUNDERS CHRIST H | |||
PCT/US98/021798 | WO | 10/14/1998 | Multi-element micro gyro Hsu, Ying Wen | |||
PCT/US98/023929 | WO | 11/10/1998 | Method for thinning semiconductor wafers with circuits and wafers made by the same Albert, Douglas; Ogzuz Volkhan H | |||
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Title of Patent and First | ||||||
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Carson, John C.; Saunders, Christ H. | ||||||
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Hsu, Ying Wen | ||||||
07/329,003 | US | 3/27/1989 | Analog to digital conversion on multiple channel IC chips | |||
Wall, Llewellyn E. | ||||||
07/377,241 | US | 7/7/1989 | Inventorship not available | |||
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Minahan, Joseph A.; Pepe, Angel A. | ||||||
07/884660 | US | 5/15/1992 | Non-conductive end layer for integrated stack of IC chips | |||
Miyake, Michael K. | ||||||
07/955461 | US | 10/2/1992 | Fabrication of dense parallel solder bump connections | |||
Joseph Minahan | ||||||
08/052,475 | US | 4/23/1993 | Electronic module comprising a stack of IC chips each interacting with an IC chip secured to the stack face Carson, John C.; Some, Raphael R. | |||
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Title of Patent and First | ||||||
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08/213,149 | US | 3/15/1994 | 3D stack of IC chips having leads reached by vias through passivation covering access plane | |||
Johnson, Tony K. | ||||||
08/870,812 | US | 6/6/1997 | Multi-element micro gyro | |||
Hsu, Ying W.; Reeds, III, John W.; Saunders, Christ H. | ||||||
08/943,305 | US | 10/14/1997 | Multi-element micro gyro | |||
Hsu, Ying W.; Reeds, III, John W.; Saunders, Christ H. | ||||||
09/190,378 | US | 11/10/1998 | Method for thinning semiconductor wafers with circuits and wafers made by the same | |||
Albert, Douglas | ||||||
09/770,864 | US | 1/26/2001 | Method of making a stackable microcircuit layer from a plastic encapsulated microcircuit | |||
Douglas M. Albert; Keith D. Gann | ||||||
10/197,006 | US | 7/16/2002 | Wearable biomonitor with flexible thinned integrated circuit | |||
Ogzuz, Volkhan H; Khashayar, Abbas | ||||||
10/663,371 | US | Stacked microelectronic module with vertical interconnect vias Ogzuz, Volkhan H; | ||||
10/805,849 | US | 3/22/2004 | Three-dimensional imaging device incorporating stacked layers containing microelectronic circuits | |||
David E. Ludwig; John V. Kennedy; Christian Krutzik | ||||||
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Ogzuz, Volkhan H; Khashayar, Abbas |
Title of Patent and First | ||||||
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60/036,759 | US | 1/28/1997 | Multi-element micro gyro | |||
Hsu, Ying W.; Reeds, III, John W.; Saunders, Christ H. | ||||||
60/049,025 | US | 6/9/1997 | Stacking layers containing enclosed IC chips | |||
Eide, Floyd K. | ||||||
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60/049,582 | US | 6/13/1997 | IC stack utilizing BGA contacts | |||
Eide, Floyd K. | ||||||
60/065,088 | US | |||||
60/238,797 | US | 10/6/2000 | High speed data switch with traverse-mated stacks containing superconducting electronics | |||
John Carson | ||||||
60/274,120 | US | |||||
60/305,353 | US | Biomonitor device | ||||
Ogzuz, Volkhan H | ||||||
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60/348,852 | US | 1/17/2002 | Field programmable gate array structure incorporating high density support circuitry and method for making same | |||
Ozguz, Volkan H.; | ||||||
60/354,442 | US | 2/7/2002 | BGA layer and assembly and method for making same | |||
Eide, Floyd K. | ||||||
60/355,955 | US | 2/12/2002 | Stacked BGA assembly Eide, Floyd K. | |||
60/394,167 | US | 7/8/2002 | Cryopump piston position tracking using an encoder | |||
Sapir, Itzhak | ||||||
60/410,895 | US | Wearable biomonitor with flexible thinned integrated circuit | ||||
Ogzuz, Volkhan H; Khashayar, Abbas |
Title of Patent and First | ||||||
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60/424,022 | US | NEO-wafers and NEO-chips, device and method | ||||
Sambo S. He | ||||||
60/424,025 | US | 11/6/2002 | Creating wafers from singulated die | |||
Stern, Jonathan Michael | ||||||
60/462,677 | US | 3/28/2003 | High-speed transmitter and receiver incorporating three-dimensional readout electronic module | |||
David E. Ludwig; | ||||||
60/546,598 | US | 2/20/2004 | BGA-scale stacks comprised of thin small outline packages and method for making the same | |||
Gann Keith; William E. Boyd | ||||||
60/617,356 | US | 10/8/2004 | Anti-tamper module | |||
Volkan H. Ozguz; John Leon | ||||||
60/652,777 | US | 2/14/2005 | Stacked ball grid array package module utilizing one or more interposer layers | |||
William E. Boyd; Daniel Michaels | ||||||
60/678,618 | US | 5/5/2005 | GPS incorporating low power real time clock circuitry | |||
Itzhak Sapir | ||||||
60/684,372 | US | 5/26/2005 | Stackable layers of encapsulated integrated circuit chips interconnected with prefabricated via structures | |||
Volkan Ozguz; Jonathan Stern | ||||||
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Keith Gann; Douglas N. Albert |
Title of Patent and First | ||||||
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60/711,375 | US | 8/26/2005 | High density interconnect scheme for stacked electronic modules | |||
John V. Kennedy | ||||||
60/711,376 | US | 8/26/2005 | MEMS cooling device | |||
Itzhak Sapir | ||||||
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Stewarrt Clark | ||||||
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Stewarrt Clark | ||||||
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Carlson, Randolph S. | ||||||
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Go, Tiong C. | ||||||
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Go, Tiong C. | ||||||
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Rotolante, Ralph A.; Koehler, Toivo |
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Carson, John C.; Dahlgren, Paul F. | ||||||
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Carson, John C.; Dahlgren, Paul F. | ||||||
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Clark, Stewart A. | ||||||
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Rotolante, Ralph A.; Koehler, Toivo | ||||||
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Carson, John C.; Clark, Stewart A. | ||||||
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Carson, John C.; Clark, Stewart A. | ||||||
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Carson, John C.; Clark, Stewart A. | ||||||
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Carson, John C.; Clark, Stewart A. | ||||||
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Arnold, Jack L. | ||||||
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Wall, Llewellyn E. | ||||||
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Arnold, Jack L. | ||||||
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John C. Carson; Volkan H. Orguz | ||||||
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Go, Tiong C.(deceased,); Minahan, Joseph A.; Shanken, Stuart N. | ||||||
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Wall, Llewellyn E. | ||||||
EP92916059.6 | EP | 6/24/1992 | Fabricating electronic circuitry unit containing stacked IC layers having lead rerouting | |||
Go, Tiong C.(deceased,); Minahan, Joseph A.; Shanken, Stuart N. | ||||||
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Pepe, Angel A.; Reinker, David M.; Minahan, Joseph A. | ||||||
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Carson, John C.; DeCaro, Robert E.; Hsu, Ying; Miyake, Michael K. |
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EP98957755.6 | EP | 11/10/1998 | Method for thinning semiconductor wafers with circuits and wafers made by the same | |||
Albert, Douglas; Ogzuz Volkhan H | ||||||
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Hsu, Ying Wen | ||||||
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DE0683968 (DE94903352.6) | DE | 10/24/2002 (12/1/1993) | Module comprising IC memory stack dedicated to and structurally combined with an IC microprocessor chip | |||
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CH0511218 (CH90917886.5) | CH | 3/12/1997 (6/28/1990) | Fabricating electronic circuitry unit containing stacked IC layers having lead rerouting | |||
Go, Tiong C.(deceased,); Minahan, Joseph A.; Shanken, Stuart N. | ||||||
BE0511218 (BE90917886.5) | BE | 3/12/1997 (6/28/1990) | Fabricating electronic circuitry unit containing stacked IC layers having lead rerouting | |||
Go, Tiong C.(deceased,); Minahan, Joseph A.; Shanken, Stuart N. |
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AU20020332937 | AU | 9/9/2002 | Stacking of multilayer modules | |||
Yamaguchi, James Satsuo; Pepe, Angel Antonio; Ozguz, Volkan H.; Camien, Andrew Nelson | ||||||
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Pepe, Angel Antonio; Yamaguchi, James Satsuo | ||||||
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Ogzuz, Volkhan H; Khashayar, Abbas | ||||||
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Gann, Keith D.; Albert, Douglas M. | ||||||
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Eide, Floyd K. | ||||||
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Go, Tiong C.(deceased,); Minahan, Joseph A.; Shanken, Stuart N. | ||||||
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Go, Tiong C.(deceased,); Minahan, Joseph A.; Shanken, Stuart N. |