Technology License Agreement for MIPS Cores between MIPS Technologies, Inc. and ITEX, Inc.

Contract Categories: Intellectual Property › License Agreements
Summary

This agreement, effective May 30, 2000, is between MIPS Technologies, Inc. and ITEX, Inc. MIPS grants ITEX a non-exclusive, worldwide license to use certain MIPS processor core technologies (MIPS Cores) for developing and manufacturing semiconductor chips. ITEX may design and have chips made at approved foundries, with the option to license additional cores. The agreement outlines confidentiality, intellectual property rights, and revenue definitions. Some information is confidential and has been omitted. The agreement sets the terms for how ITEX can use MIPS technology and the conditions for licensing and manufacturing chips.

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EX-10.32 7 a2043243zex-10_32.txt EXHIBIT 10.32 CONFIDENTIAL TREATMENT REQUESTED. CONFIDENTIAL PORTIONS OF THIS DOCUMENT HAVE BEEN OMITTED AND HAVE BEEN SEPARATELY FILED WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. Exhibit 10.32 TECHNOLOGY LICENSE AGREEMENT FOR MIPS CORES THIS TECHNOLOGY LICENSE AGREEMENT FOR MIPS CORES including Exhibits thereto (the "Agreement") is made to be effective as of May 30, 2000 (the "Effective Date") by and between MIPS TECHNOLOGIES, INC., a Delaware corporation with its principal place of business at 1225 Charleston Road, Mountain View, California 94043, ("MIPS") and ITEX, INC., a Delaware corporation with its principal place of business at 2710 Walsh Avenue, Santa Clara, California 95051 ("Licensee"). BACKGROUND MIPS designs, develops and licenses intellectual property based on a Reduced Instruction Set Computer ("RISC") technology known as the "MIPS Architecture," including certain processor core designs know as the "MIPS Cores." Licensee desires to license certain MIPS Core(s) described in the MIPS Core Technology Schedule for the MIPS[*] Core and to have an option to license two additional MIPS Cores, the MIPS[*] Core and the MIPS[*] core, under the terms of the Technology Schedules attached hereto as Option Schedules 1 and 2, all appended to this Agreement, and MIPS is willing to license said MIPS Core(s), all on the terms and conditions set forth herein. In consideration of the mutual promises contained herein, the parties agree as follows: 1. DEFINITIONS 1.1 "AUTHORIZED FOUNDRY" means with respect to a particular Licensed MIPS Core, the foundry(ies) identified in the applicable Technology Schedule. 1.2 "INTELLECTUAL PROPERTY RIGHTS" means the collective intellectual property rights now held or hereafter created or acquired by a party, whether arising under the laws of the United States or any jurisdiction worldwide, for (i) all classes or types of patents, including, without limitation, utility models, utility patents and design patents, patent applications and disclosures; (ii) all copyrights and moral rights in both published and unpublished works and all registrations and applications therefor; (iii) all mask works and all registrations and applications therefore; and (iv) all inventions, know-how, trade secrets, and confidential, technical and non-technical information. 1.3 "LICENSEE APPLICATION" means with respect to a particular Licensed MIPS Core, the application for which the Licensee Chips are targeted as identified on the applicable Technology Schedule. 1.4 "LICENSEE CHIP" means a single die that is packaged and that incorporates at least one instantiation of a Licensed Hard Core Implementation of a Licensed MIPS Core, which chip (i) is designed by Licensee for the applicable Licensee Application; and (ii) contains substantial functionality in addition to the functionality of the Licensed Hard Core Implementation. A Licensee Chip shall not be stand-alone CPU. 1.5 "LICENSED MIPS CORE" shall mean a MIPS Core licensed by MIPS to Licensee pursuant to, and described in, a Technology Schedule entered into by the parties pursuant to the terms of this Agreement. 1.6 "LICENSED HARD CORE IMPLEMENTATION" means an implementation of a Licensed MIPS Core, in non-synthesizable, layout (GDSII or other mutually agreed upon) format, targeting a semiconductor manufacturing process technology owned and used by an Authorized Foundry. 1.7 "MIPS CORE" means any functional block of integrated circuits that implement, in whole or in part, MIPS Technology. 1.8 "MIPS DELIVERABLE" means any deliverable identified in a Technology Schedule to be delivered by MIPS or that is otherwise delivered by MIPS to Licensee during the term of the applicable Technology Schedule. The MIPS Deliverables may be further divided into "Restricted Confidential Deliverables," including without limitation the Synthesizable Licensed MIPS Core, "Internal Confidential Deliverables," "External Confidential Deliverables" and "Commercial Deliverables" as set forth in the applicable Technology Schedule. 1.9 "MIPS ISA" means any processor instruction set architecture ("ISA") and associated privileged resource architecture first developed by or for MIPS or its predecessor entities. 1.10 "MIPS TECHNOLOGY" means MIPS ISAs, MIPS Deliverables, any other MIPS Proprietary Information, and any Intellectual Property Rights associated with the foregoing. 1.11 "NET REVENUE" means the gross revenue received by Licensee from the sale of each Licensee Chip accounted for in accordance with generally accepted accounting principles, and after deduction for discounts, returns, freight, insurance, taxes, and duties, if any, which are separately identified on the invoice. Such gross revenue shall include the fair market value of all non-monetary consideration such as services or technology licenses received by Licensee, and shall be no less than the amount which would be negotiated for such gross revenue in an arm's-length transaction. 1.12 "PROPRIETARY INFORMATION" means (a) the MIPS Technology, (b) any and all other information which is disclosed by MIPS to Licensee orally, electronically, visually, or in a document or other tangible form which is either identified as or should be reasonably understood to be confidential and/or proprietary, (c) any test results, error data, or other reports, including "Log Results" made by Licensee in connection with the license rights granted under this Agreement or any Technology Schedule, (d) any notes, extracts, analyses, or materials prepared by Licensee which are copies of the Proprietary Information or from which the substance of the Proprietary Information can be inferred or otherwise understood, and (e) the terms, conditions, and existence of this Agreement and any Technology Schedules. "Proprietary Information" shall not include information received from MIPS which Licensee can clearly establish by written evidence (i) is or becomes rightfully known by Licensee without an obligation to maintain its confidentiality; (ii) is or becomes generally known to the public through no fault of Licensee; or (iii) is independently developed by Licensee without use of the Proprietary Information. MIPS does not desire to receive Licensee's proprietary information under the terms of this Agreement or any Technology Schedule. Therefore, unless otherwise agreed in a separate written non-disclosure agreement executed between the parties, any information which Licensee supplies to MIPS shall not be subject to an obligation of confidence by MIPS and MIPS shall not be liable for any use or disclosure thereof, except for liability that may arise out of the infringement of valid patents. 1.13 "SYNTHESIZABLE LICENSED MIPS CORE" means a RTL model of a Licensed MIPS Core, which can be synthesized into a gate level netlist. 1.14 A Licensee Chip is "TAPED OUT" and the "TAPEOUT" of such Licensee Chip occurs when the GDSII or an equivalent format representation of such Licensee Chip is completed. 2. LICENSE GRANTS. 2.1 LICENSE GRANT. Subject to the terms and conditions of this Agreement and the applicable Technology Schedule, MIPS grants to Licensee a non-exclusive, worldwide, non-transferable right and license to: 2.1.1 internally develop or have developed by third parties approved in writing by MIPS, a Licensed Hard Core Implementation from the Synthesizable Licensed MIPS Core delivered by MIPS under the applicable Technology Schedule; 2.1.2 internally design Licensee Chips incorporating a Licensed Hard Core Implementation created pursuant to Subsection 2.1.1.; [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -1- 2.1.3 have made each Licensee Chip at the Authorized Foundry to whose process the Licensed Hard Core Implementation incorporated in such Licensee Chip is targeted; 2.1.4 use, import, offer for sale, and sell or otherwise distribute Licensee Chips only as provided in the applicable Technology Schedule; 2.1.5 use, copy, modify, reproduce and have reproduced, create derivative works from, and sell or otherwise distribute the Commercial Deliverables identified in the applicable Technology Schedule only in conjunction with distribution or sale of the applicable Licensee Chips provided that all Commercial Deliverables modified by Licensee just: (i) be factually accurate and complete, and (ii) contain all copyright and other proprietary notices contained in the original Commercial Deliverables provided by MIPS to Licensee. 2.1.6 Provide External Confidential Deliverables identified in the applicable Technology Schedule under an appropriate nondisclosure agreement to Licensee's customers only for the purposes of developing and testing the customer's systems which will incorporate a Licensee Chip and as otherwise specifically permitted in the applicable Technology Schedule, subject to any restrictions identified in the applicable Technology Schedule. 2.2 THIRD PARTIES. For purposes of Subsections 2.1.1 and 2.1.2, "internally" shall include the use of individuals working at Licensee's facilities who are not Licensee's employees provided that such individuals work under the direct supervision of a Licensee employee and that no more than five (5) of such individuals work for the same third party unless approved in writing by MIPS. Licensee's rights to use third parties to internally develop and internally design under Subsections 2.1.1 and 2.1.2 and to use authorized third parties to "have developed" and to "have made" under Subsections 2.1.1 and 2.1.3 are conditioned upon each third party agreeing to be bound in writing by obligations with respect to Proprietary Information that are at least as protective as those contained in this Agreement and each third party supplying the contracted work solely to Licensee. Any required written approval from MIPS to use a third party may be obtained either in a Technology Schedule or in a separate document in the form of EXHIBIT C. Licensee's rights to provide the External Confidential Deliverables to Licensee's customers is conditioned upon each customer third party agreeing to be bound in writing by obligations with respect to Proprietary Information that are at least as protective as those contained in this Agreement. If any third party breaches its obligations with respect to Proprietary Information referred to in this Section 2.2, and Licensee fails to use its reasonable efforts to remedy the breach and prevent further breaches by the third party and such failure materially jeopardizes MIPS rights and interests in and to any MIPS Technology, Licensee agrees that such breach shall be treated as a material breach and prevent further breaches by the third party and such failure materially jeopardizes MIPS rights and interests in and to any MIPS Technology, Licensee agrees that such breach shall be treated as a material breach of this Agreement and any applicable Technology Schedule by Licensee which is incapable of remedy thus entitling MIPS to terminate this Agreement and any applicable Technology Schedule in accordance with the provisions of Section 14 and MIPS may, at its election and in addition to any other remedies that it may have, undertake enforcement directly against the breaching third party. Licensee shall hold MIPS harmless from and indemnify MIPS against any and all losses, liabilities, costs, damages, and expenses (including reasonable attorneys' fees), arising out of or in connection with such breach. 2.3 NO SUBLICENSE. Licenses shall not have the right to sublicense the rights granted hereunder to any third party. 2.4 LIMITATION ON LICENSE. All Intellectual Property Rights and other proprietary rights of MIPS not expressly granted to Licensee in this Agreement or the applicable Technology Schedule are expressly reserved by MIPS. Other than the licenses specifically granted to Licensee in Section 2.1, Licensee may not use the MIPS Deliverables for any other purpose. No right is granted under Section 2.1 to modify or create derivative works of the Synthesizable Licensed MIPS Core except to configure it in accordance with the options set forth in the Implementor's Guide for the applicable Licensed MIPS Core (the "Configured Synthesizable Licensed MIPS Core") and as strictly necessary to create Licensed Hard Core Implementations, provided the sequential behavior of the Configured Synthesizable Licensed MIPS Core on a cycle-by-cycle basis. Licensee shall not offer for sale, sell or distribute Synthesizable Licensed MIPS Cores or Licensed Hard Core Implementations except when incorporated in the applicable Licensee Chips. 2.5 NO REVERSE ENGINEERING. Licensee may not reverse engineer any MIPS Deliverables not delivered in source format (the "binary materials") nor may Licensee decompile, disassemble, or otherwise reduce the binary materials or any component thereof to human readable or non-binary form 3. DELIVERY. 3.1 DELIVERY. MIPS will deliver the MIPS Deliverables by electronic means to Licensee in accordance with the delivery schedule set forth in the applicable Technology Schedule or by other means as appropriate. For purposes of this Agreement, electronic delivery may be accomplished by electronically transmitting deliverables or by making deliverables available for download by Licensee from a protected download site. 3.2 USE OF DELIVERABLES. Licensee shall use the most recent version of each MIPS Deliverable available from MIPS prior to the commencement of the design of each Licensee Chip, or any subsequently available version of such MIPS Deliverable, in the design and development of such chip. Licensee shall notify MIPS (the form attached as Exhibit C is to be used for this purpose) upon the commencement of the design of Licensee Chip. Provided Licensee complies with Section 3.2 in the design of a Licensee Chip, the MIPS Deliverables shall be covered by MIPS indemnification as set forth in Section 12.1 with respect to that Licensee Chip. 4. COMPATIBILITY VERIFICATION PROCESS. Licensee shall ensure that each Licensed Hard Core Implementation passes the Compatibility Verification Process identified in EXHIBIT B attached hereto before the commencement of commercial production of each Licensee Chip incorporating such Licensed Hard Core Implementation. 5. PAYMENTS. 5.1 LICENSE FEES. For the rights granted in Section 2 with respect to each Licensed MIPS Core, Licensee shall pay MIPS the license fees m forth in the applicable Technology Schedule in accordance with the schedule provided therein. 5.2 ROYALTIES. For the rights granted in Section 2 with respect to each Licensed MIPS Core, Licensee shall pay MIPS the royalties set forth in the applicable Technology Schedule. Royalties with respect to Licensee Chips shall accrue when Licensee ships the Licensee Chips to its customers. Licensee shall pay all royalties within thirty (30) days after the end of the calendar quarter in which they accrue, and the parties agree that no amounts shall be withheld from such royalty payments by Licensee for bad debt. 5.3 SUPPORT AND MAINTENANCE. For the rights granted in Section 9.1 with respect to each Licensed MIPS Core, Licensee shall pay MIPS the support and maintenance fees set forth in the applicable Technology Schedule. 5.4 LATE PAYMENT FEES. All late payments shall be subject to a late payment penalty calculated at the rate of one and one-half percent (1.5%) per month or the maximum allowable by law, whichever is less. 5.5 WIRE TRANSFER ACCOUNT: TAXES. All payments shall be made in U.S. dollars by wire transfer to the Bank of America at Payment Services Operations, Dept. 5693, 1850 Gateway Boulevard, Concord California 94520, for MIPS Technologies, Inc.'s account number [*], and bank routing number [*], or such other account as MIPS may identify in writing from time to time. All [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -2- payments by Licensee shall be made free and clear of, and without reduction for, any and all taxes, including, without limitation, sales, use, value added, withholding or similar taxes, excluding taxes which are imposed on the income of MIPS. 5.6 ROYALTY REPORTS. Within thirty (30) days after the end of each calendar quarter, Licensee shall furnish to MIPS a statement, in suitable form, providing the names and part numbers of all Licensee Chips shipped during the quarter, the number of instantiations of each Licensed Hard Core Implementation that are in each Licensee Chip, the number of units of each Licensee Chip shipped during the quarter, the Net Revenue associated with each Licensee Chip shipped during the quarter, whenever applicable, a non-binding forecast detailing the number of Licensee Chips to be manufactured in the next six (6) months, and the amount, method of calculation, and any other data necessary for calculation of the royalty payable for such calendar quarter. All royalty reports should be sent to MIPS at the address first set forth above, Attention: Controller. Fax: 650 ###-###-####. 5.7 BOOKS AND RECORDS. Licensee shall keep complete and accurate records which support the license fees, royalties, other payments and reports provided to MIPS pursuant to Sections 5.1, 5.2, 5.3 and 5.6 respectively. These records shall be retained for a period of at least three (3) years from the date of the applicable payment or report, notwithstanding the expiration or other termination of this Agreement or of any Technology Schedule. Subject to confidentiality obligation with Licensee, MIPS' designated accounting firm shall have the right to examine and audit, not more than once a year unless the preceding audit revealed a material discrepancy, and during normal business hours, all such records and such other records and accounts as may contain, under recognized accounting practices, information bearing upon the amount of license fees, royalties and other payments payable to MIPS under this Agreement and any Technology Schedule. Prompt adjustments shall be made by Licensee or MIPS to compensate for any errors and/or omissions disclosed by such examination or audit which result in an underpayment or overpayment of license fees, royalties and/or other payments hereunder, including payment of applicable late payment fees. Should the amount of any such error and/or omission exceed five percent (5%) of the total license fees, royalties and other payments due for the period under audit, Licensee shall pay for the cost of the audit. 6. MARKETING RIGHTS AND OBLIGATIONS 6.1 LICENSEE OBLIGATIONS. Licensee shall: 6.1.1 have the right to participate in cooperative marketing activities in accordance with the terms of the separate Trademark License Agreement entered into by the parties and attached as EXHIBIT D to this Agreement (the "Trademark License Agreement"). 6.1.2 consult with MIPS regarding any advertising or trade practice which might adversely affect the good name, trademarks, goodwill, or reputation of MIPS; 6.1.3 obtain and maintain all necessary government licenses, permits and approvals when necessary or advisable for implementation of this Agreement and any Technology Schedule, and comply with all applicable laws and regulations; and 6.1.4 report all material errors in the MIPS Deliverables experienced by Licensee in sufficient detailed to allow MIPS to identify and recreate such errors. 6.2 PRESS RELEASE(S). The parties agree to jointly issue a mutually agreed upon press release announcing the existence of this Agreement and each Technology Schedule promptly after its execution. Thereafter, each party may issue press releases or other promotional materials which (i) identify Licensee as a MIPS licensee, (ii) identify the Licensed MIPS Core(s) licensed to Licensee, and/or (iii) identify the Licensee Chip(s) as incorporating such Licensed MIPS Core(s). Licensee will use commercially reasonable efforts to promote its use of MIPS Technology that are incorporated in its products. 6.3 TRADEMARKS. No rights to use MIPS trademarks are granted under this Agreement. All such rights shall be granted pursuant to the separate Trademark License Agreement. 7. OWNERSHIP 7.1 MIPS TECHNOLOGY. Except as otherwise specifically provided in this Agreement, MIPS reserves all right, title and interest in the MIPS Technology and other designs, data, documentation, technology, and/or know-how developed by MIPS. 7.2 COMMERCIAL DOCUMENTATION. MIPS shall own all right, title and interest in and to the Commercial Deliverables provided by MIPS to Licensee. Licensee shall own all right, title and interest in and to the modifications and derivative works of the Commercial Deliverables created by Licensee, subject to MIPS' rights in the underlying original Commercial Deliverables. 7.3 PROPRIETARY NOTICES. 7.3.1 COMMERCIAL DELIVERABLES. All Commercial Deliverables provided by MIPS to Licensee are copyrighted by MIPS or its licensors. As a condition of the reproduction and distribution rights granted in Subsection 2.1.5, Licensee shall retain, reproduce and apply any copyright notices and/or other proprietary rights notices or symbols included on or embedded in the Commercial Deliverables to all copies, in whole or in part, in any form, of the Commercial Deliverables reproduced hereunder. 7.3.2 LICENSEE CHIPS. Licensee shall cause MIPS' respective copyright and mask work notices to be placed on the masks of all Licensee Chips containing portions of MIPS copyrighted or MIPS mask work content. 7.3.3 PATENT MARKING. To the extent technically feasible without change to the size or physical form of its products, Licensee agrees to mark or have marked permanently and legibly all Licensee Chips manufactured pursuant to this Agreement or associated documentation with such patent notice as may be specified by MIPS from time to time. 7.3.4 RIGHTS IN DATA. Licensee acknowledges that all software and software related items licensed by MIPS to Licensee pursuant to this Agreement and any Technology Schedule are "Commercial Computer Software" or "Commercial Computer Software Documentation" as defined in FAR 12.212 for civilian agencies and DFARS ###-###-#### for military agencies, and that in the event that Licensee is permitted under this Agreement to provide such items to the U.S. government, such items shall be provided under terms at least as restrictive as the terms of this Agreement and the applicable Technology Schedule. 8. COVENANT NOT TO SUE The parties agree to the terms and conditions set forth in EXHIBIT E. 9. SUPPORT, MAINTENANCE AND PROGRAM MANAGEMENT 9.1 MAINTENANCE AND SUPPORT OF LICENSEE. MIPS will provide the maintenance and support services in connection with the MIPS Deliverables as set forth in the applicable Technology Schedule. If Licensee requests additional support, MIPS shall use reasonable efforts to provide additional support and assistance to Licensee with respect to the MIPS Deliverables in accordance with the reasonable availability of MIPS employees at MIPS' then-current standard fees, terms and conditions. Licensee acknowledges that there may be periods when MIPS employees are not available to provide additional support. MIPS shall have no responsibility or obligation to provide any maintenance or support with respect to any MIPS Deliverables that have been modified by Licensee except as permitted under Section 2.4 hereunder and/or the applicable Technology Schedule. 9.2 SUPPORT OF LICENSEE CUSTOMERS. Licensee shall be responsible for all support to customers of Licensee Chips. Licensee shall ensure that all questions with respect to any Licensee Chip are addressed to and answered by Licensee, and Licensee will -3- not represent that MIPS is available to answer any questions from such customers directly. 9.3 PROGRAM MANAGEMENT. Each party shall identify an individual employee (its "Program Manager") who shall be responsible for interfacing with the other party, especially in connection with the provision of MIPS Deliverables and support and maintenance, under each Technology Schedule. The Program Manager shall be knowledgeable about his employer's products and design and manufacturing activities and possess adequate communication skills to keep the other party fully informed relative to his/her employer's performance under this Agreement and the applicable Technology Schedule. Each party shall notify the other in writing of any successor Program Manager. 10. PROPRIETARY INFORMATION 10.1 USE OF PROPRIETARY INFORMATION. Licensee agrees: 10.1.1 to use the Proprietary Information only as necessary to exercise its rights or fulfill its obligations under this Agreement or any Technology Schedule; 10.1.2 to implement reasonable procedures to prohibit the disclosure, unauthorized duplication, misuse or removal of Proprietary Information; and 10.1.3 not to disclose Proprietary Information to employees not having a need to know or to any third party (except that Licensee may, in appropriate circumstances and subject to a nondisclosure agreement with terms and conditions at least as protective as the terms of this Section 10, disclose Proprietary Information to Licensee's contractors and customers, solely as permitted under Section 2.2 of this Agreement). 10.2 STANDARD OF CARE. Without limiting the foregoing, Licensee shall at all times protect the Proprietary Information with at least the same standard of care as it exercises to protect its own proprietary information of like importance, but in no event less than reasonable care. Notwithstanding the foregoing, Licensee acknowledges and agrees that the Synthesizable Licensee MIPS Core, Verification Test Suite and any MIPS Deliverables identified as Restricted Confidential Deliverables on the applicable Technology Schedule (collectively "Restricted Confidential Deliverables") are furnished to Licensee on an enhanced confidential and trade secret basis and Licensee agrees to take additional steps to prevent unauthorized disclosure thereof, including but not limited to, the following: 10.2.1 Except as set forth in Subsection 10.2.2.5 below, Licensee will use the Restricted Confidential Deliverables only in select buildings at a site approved by MIPS (and any other site upon prior written notice from Licensee and approval from MIPS within thirty (30) days of notice, such approval will not be unreasonably withheld) which buildings shall have restricted access twenty-four (24) hours a day, and Licensee shall not use the Restricted Confidential Deliverables in any other buildings or at any other site without MIPS' prior written consent; 10.2.2 For Restricted Confidential Deliverables that are capable of being stored on a computer, the following restrictions apply: 10.2.2.1 Restricted Confidential Deliverables may be placed on file server(s) only if access to such server(s) is restricted to a known set of computer systems (the "Systems"). Except as necessary to carry out Subsection 10.2.5 below, the Systems will be located exclusively in the select buildings identified in Subsection 10.2.1 above; 10.2.2.2 Restricted Confidential Deliverables shall be protected using, at a minimum, native operating system permissions capabilities to restrict all access (including read access) to a known and specific group of users, each of whom has a need to use as set out in Subsection 10.2.4 below. Moreover, such users shall use commercially reasonable password security, and "log off" or "lock access" to their Systems when not in use; 10.2.2.3 Restricted Confidential Deliverables may be backed up only to a medium which is also protected as required for Restricted Confidential Deliverables; 10.2.2.4 Except as provided in this Subsection 10.2.2.4, the Systems will not allow access to a privileged account (e.g., a "root," "supervisor" or "administrative" account) that would allow bypassing of access control mechanisms as set out in Subsection 10.2.2.2 above. If such privileged accounts must exist for normal maintenance or administrative purposes, these accounts will be restricted to a small set of Licensee's employees who will be subject to the terms of Subsection 10.2.4 below; and 10.2.2.5 Licensee shall prevent remote access to the Restricted Confidential Deliverables from other locations by any party other than Licensee's employees that would otherwise have access or MIPS. Should files move to another system, whether or not remote, the same access limitations shall apply. 10.2.3 Licensee agrees to allow reasonable access for MIPS representatives to all buildings, rooms and computers (including passwords) where the Restricted Confidential Deliverables are kept, during normal business hours, to ensure that Licensee is complying with its obligations with respect to such information. 10.2.4 Licensee agrees to restrict access to the Restricted Confidential Deliverables solely to those of its employees who have a need to use the information for performing its duties and exercising its rights under this Agreement. As used in this Agreement "access" means having the capability to view, copy, display, print, transfer, or otherwise manipulate or have exposure to any form of the information. Licensee agrees to maintain a log which contains a list of all individuals who at any time actually have access to or have had access to the Restricted Confidential Deliverables or any portion thereof, including those individuals having privileged accounts as permitted under Subsection 10.2.2.4. Licensee agrees to comply with the requests of MIPS, from time to time, to provide MIPS with information required to determine whether specified individuals did or did not have access to the Restricted Confidential Deliverables or any portion thereof. If requested by MIPS, Licensee agrees to require each employee, prior to the employee's access to this information, to sign a confidentiality agreement which in form and substance contains obligations of confidentiality as strict as the obligations contained herein. 10.3 CONFIDENTIALITY OF AGREEMENT. Except as expressly provided herein, each party agrees that the terms and conditions of this Agreement and any Technology Schedule shall be treated as confidential and that neither party will disclose the terms or conditions of this Agreement or any Technology Schedule to any third party without the prior written consent of the other party (such consent will not be unreasonably withheld), provided, however, that each party may disclose the terms and conditions of this Agreement, to the extent necessary: (a) as required by any court of other governmental body; (b) as otherwise required by law; (c) in confidence to legal counsel of the parties, accountants, and other professional advisors; (d) in confidence, to banks, investors and other financing sources and their advisors; (e) in connection with the enforcement of this Agreement or rights under this Agreement; or (f) in confidence, in connection with an actual or prospective merger or acquisition or similar transaction. With respect o disclosure required by a court or governmental order, the disclosing party shall provide prior notification of such impending disclosure to the non-disclosing party. All reasonable efforts to preserve the confidentiality of the terms of this Agreement and any Technology Schedule shall be expended by the disclosing party in complying with such an order, including obtaining a protective order to the extent reasonably possible 11. DISCLAIMER OF WARRANTIES MIPS MAKES NO WARRANTIES AND DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR OTHERWISE, INCLUDING, BUT NOT LIMITED -4- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THE LICENSED MIPS CORES, LICENSED HARD CORE IMPLEMENTATIONS, LICENSEE CHIPS, AND MIPS TECHNOLOGY. 12. INDEMNIFICATION 12.1 INDEMNIFICATION BY MIPS. Subject to the limitations set forth in this Section 12.1, MIPS shall indemnify Licensee against any claim based on infringement of Intellectual Property Rights of a third party in the United States, Japan or the countries contained in the European Union as of the Effective Date of this Agreement, by the MIPS Deliverables in the form provided by MIPS to Licensee hereunder, and shall defend at its expense all suits against Licensee based upon such a claim and shall pay costs and damages awarded against Licensee in such suit; provided that Licensee: (a) promptly notifies MIPS in writing of any such claim, and (b) reasonably cooperates with MIPS, at MIPS' expense, in defending or settling such claim. MIPS shall have sole control of the defense and all related settlement negotiations, provided however that Licensee shall have the right to be represented by its own attorney at its expense. This indemnity does not extend to any suit based upon (i) any infringement or alleged infringement of any patent, copyright, mask work right, trade secret, or other intellectual property right of a third party by the manufacturing process used to manufacture Licensee Chips, or by any modification to any MIPS Deliverable made by or for Licensee, (ii) the use of a version of MIPS Deliverables that is not covered for indemnification under Section 3.2 with respect to the applicable Licensee Chip, or (iii) the use of any MIPS Core or any MIPS Deliverables in combination with other technology, equipment or software not provided by MIPS, modification or enhancement to a MIPS Core or MIPS Deliverable not made by MIPS, or any modification or enhancement made by MIPS at Licensee's request, if such claim would not have occurred but for such combination, modification or enhancement. If in MIPS' reasonable judgment, the use of any MIPS Deliverable, the use, manufacture or sale of Licensee Chips, and/or the licensing or use of Licensed MIPS Cores or any portion thereof, is likely to be found to infringe the Intellectual Property Rights of a third party, MIPS may, at its option, either (x) procure the right to allow Licensee to continue the allegedly infringing activity; (y) replace or modify the affected MIPS Deliverables so that they become non-infringing; or (z) if (x) or (y) is not commercially practicable, or Licensee does not cease use of any MIPS Deliverable which was modified or replaced, or cease the use, manufacture or sale of any Licensee Chip which may be infringing the Intellectual Property Rights of a third party, then MIPS may provide written notice to Licensee identifying the allegedly infringing MIPS Deliverable or the allegedly infringing activity and terminate Licensee's license with respect thereto. In the event Licensee requests that the license with respect to any allegedly infringing MIPS Deliverable or allegedly infringe activity remain in effect, such license would remain in effect for so long as Licensee procures any necessary licenses from third parties and indemnifies MIPS for all costs and damages incurred by MIPS with respect to Licensee's continued use of the allegedly infringing MIPS Deliverable or the allegedly infringing activity, which indemnification obligation to MIPS shall not be limited by the total liability cap set forth in Section 13 or by the last sentence of Section 12.2 below. Upon MIPS performance of (x), (y) or (z) above, the liability of MIPS for such allegedly infringement shall terminate with respect o all damages arising from such alleged infringement after the date of MIPS' performance. THIS SECTION STATES MIPS' ENTIRE LIABILITY FOR INFRINGEMENT. 12.2 INDEMNIFICATION BY LICENSEE. Subject to the limitations set forth in this Section 12.2, Licensee shall defend, indemnify and hold MIPS harmless against any action brought against MIPS as a result of: (a) a claim (i) that the manufacturing process used by or on behalf of Licensee in manufacturing Licensee Chips infringes the Intellectual Property Rights of a third party; (ii) that the use of any Licensed Hard Core Implementation, Licensee Chip or MIPS Deliverable by Licensee in combination with other technology, equipment or software not provided by MIPS, infringes the Intellectual Property Rights of a third party if the infringement is caused by the combination; or (iii) of infringement of the Intellectual Property Rights of a third party based on the use by Licensee or its agents of a version of the MIPS Deliverables other than the most recent version of such MIPS Deliverables available to Licensee at the time Licensee Chip design commences; or (b) a claim arising from any false or misleading representation made by Licensee or its agents regarding any MIPS Technology, Licensed MIPS Core, Licensed Hard Core Implementation, and/or Licensee Chip, or otherwise arising from the marketing or distribution practices adopted by Licensee or its agents in connection with Licensee Chips. Licensee shall pay resulting costs and damages awarded against MIPS, and attorneys' fees incurred by MIPS, in such action which are attributable to such claim. MIPS shall: (A) promptly notify Licensee in writing of any such claim, and (B) reasonably cooperate with Licensee, at Licensee's expense, in defending or settling such claim. Licensee shall have control of the defense and all related settlement negotiations, provided however that Licensee may not enter into any settlement providing for any restriction on MIPS or any MIPS Technology or MIPS Core without MIPS' consent, and provided, further, that MIPS shall have the right to be represented by its own attorney at MIPS' expense. THIS SECTION STATES LICENSEE'S ENTIRE LIABILITY FOR INFRINGEMENT. 13. LIMITATION OF LIABILITY EXCEPT FOR BREACHES OF SECTION 2 ("LICENSE GRANTS") AND SECTION 10 ("PROPRIETARY INFORMATION"), NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INCIDENTAL, CONSEQUENTIAL, SPECIAL OR PUNITIVE DAMAGES OF ANY KIND OR NATURE ARISING OUT OF THIS AGREEMENT, WHETHER SUCH LIABILITY IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR STRICT LIABILITY), OR OTHERWISE, EVEN IF THE PARTY HAS BEEN WARNED OF THE POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE, EXCEPT FOR BREACHES OF SECTION 2 ("LICENSE GRANTS"), SECTION 10 (PROPRIETARY INFORMATION"), PAYMENT OBLIGATION UNDER SECTION 5 AND THE TECHNOLOGY SCHEDULES AND LICENSEE'S INDEMNITY OBLIGATIONS AS EXPRESSLY SET FORTH IN SECTION 12.1 AND 12.2 OF THIS AGREEMENT, IN NO EVENT SHALL EITHER PARTY'S TOTAL LIABILITY UNDER THIS AGREEMENT EXCEED THE LESSER OF EITHER THE LICENSE FEES PAID FOR THE LICENSED MIPS CORE THAT IS THE SUBJECT MATTER OF THE CLAIMS OR [*]. NOTWITHSTANDING ANYTHING TO THE CONTRARY IN THIS AGREEMENT, IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES RELATING TO OR RESULTING FROM THE USE OF MIPS CORES, MIPS DELIVERABLES OR MIPS TECHNOLOGY IN PRODUCTS USED FOR AVIATION, MEDICAL, NUCLEAR OR ULTRA HAZARDOUS PURPOSES OR FOR ANY DAMAGES OWED TO THIRD PARTIES RELATING TO TECHNOLOGY NOT PROVIDED BY MIPS. LIABILITY FOR DAMAGES SHALL BE LIMITED AND EXCLUDED AS SET FORTH HEREIN, EVEN IF ANY EXCLUSIVE REMEDY PROVIDED FOR IN THIS AGREEMENT FAILS OF ITS ESSENTIAL PURPOSE. 14. TERM AND TERMINATION 14.1 TERM. The term of this Agreement shall begin on the Effective Date and, unless earlier terminated as provided below, shall continue until all Technology Schedules entered under its terms have terminated or expired. The term of any Technology Schedule will be as set forth in the Technology Schedule. 14.2 TERMINATION OF THE AGREEMENT. Either party may terminate this Agreement effective immediately upon written [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -5- notice to the other party for any reason with or without cause of any nature, thereby terminating the right to enter into any future Technology Schedules under the terms of the Agreement. The terms of the Agreement shall remain in effect with respect to any Technology Schedule that has not yet terminated or expired until said Technology Schedule terminates or expires. 14.3 TERMINATION OF A TECHNOLOGY SCHEDULE. Either party may terminate a Technology Schedule effective immediately and without liability upon written notice to the other party if the other party: (a) voluntarily petitions in bankruptcy or otherwise seeks protection under any law for the protection of debtors; (b) has a proceeding instituted against it under any provision of the Federal Bankruptcy Code or equivalent legislation of a foreign jurisdiction which is not dismissed within ninety (90) days, or is adjudged a bankrupt, ceases or suspends business, or makes an assignment of the majority of its assets for the benefit of its creditors; (c) MATERIALLY BREACHES ANY OBLIGATION UNDER THIS Agreement or a Technology Schedule which breach is not capable of remedy; or (d) materially breaches any obligation under this Agreement or a Technology Schedule which breach is capable of remedy but which is not remedied within thirty (30) days after written notice specifying the breach (the "DEFAULT NOTICE"), unless the breach specified in the Default Notice reasonably requires more than thirty (30) days to correct (specifically excluding any failure to pay money or unauthorized disclosures of Proprietary Information), and the party has begun substantial corrective action to remedy the default within such thirty (30) days period and diligently pursues such action, in which event, termination shall not be effective unless ninety (90) days has expired from the date of the Default Notice without such corrective action being completed and the default remedied. 14.4 EFFECT OF TERMINATION ON LICENSES. All licenses granted with respect to a Technology Schedule shall terminate as of the effective date of termination of that Technology Schedule, except that, provided that Licensee is not in breach of the Agreement or of the Technology Schedule and continues to pay royalties as specified in Section 5, Licensee shall have the right to continue having manufactured, distributing and selling Licensee Chips which were commercially distributed prior to the effective date of termination of that Technology Schedule. 14.5 RETURN OF PROPRIETARY INFORMATION AND PAYMENT. In the event of termination or expiration of this Agreement or any Technology Schedule, Licensee shall promptly return to MIPS all Proprietary Information not required for the exercise of any continuing rights under 14.4 and shall pay to MIPS any and all amounts due and owning under this Agreement or the Technology Schedule. 14.6 SURVIVAL OF REMEDIES. Any termination hereunder shall be in addition to any other remedy either party may have at law or in equity. 14.7 SURVIVAL. The provisions of Sections 5, 7,82 10, 11, 12, 13, 14.4, 14.5, 14.6, 14.7, and 15 shall survive any termination or expiration of this Agreement. The provisions of Section 2 shall survive as set forth in Section 14.4. 15. GENERAL TERMS AND CONDITIONS 15.1 NOTICES. Any notice required or permitted by this Agreement must be in writing and must be delivered to the party's address first set forth above to the attention of President with a copy to General Counsel and will be effective upon receipt. Each party may change its address by notice given in accordance with this Section. 15.2 EXPORT. In recognition of U.S. and non-U.S. export control laws and regulations, Licensee agrees that it will not export, or transfer for the purpose of reexport, any product, technical data received hereunder or the product produced by use of such technical data, including processes and services (the "product"), in violation of any U.S. or foreign regulation, treaty, Executive Order, law, statute, amendment or supplement thereto. Further, Licensee will not export the product to any prohibited or embargoed country or to any denied, blocked, or designated person or entity as mentioned in any such U.S. or foreign regulation, treaty, Executive Order, law, statute, amendment or supplement thereto. Unless an authorized representative of MIPS has informed Licensee in writing to the contrary, it is the responsibility of the Licensee, at Licensee's expense, to obtain all approvals and consents from any governmental or quasi-governmental entity prior to any export or reexport of the product for any reason. Upon reasonable request by Licensee, MIPS will provide to Licensee the classification or restrictions to the MIPS Deliverables provided under this Agreement. 15.3 GOVERNING LAW AND FORUM SELECTION. This Agreement shall be governed by California law excluding its choice of law rules. With the exception of MIPS' rights to enforce its Intellectual Property Rights and the confidentiality obligations under this Agreement or any Technology Schedule, all disputes arising out of this Agreement shall be subject to the exclusive jurisdiction and venue of the state and federal courts located in Santa Clara County, California, and the parties consent to the personal and exclusive jurisdiction and venue of these courts. The parties expressly disclaim the application of the United Nations Convention on the International Sale of Goods to this Agreement. 15.4 WAIVER OR DELAY. Any express waiver or the failure to exercise promptly any right under this Agreement will not create a continuing waiver or any expectation of non-enforcement. 15.5 ASSIGNMENT. Licensee may not assign its rights and obligations hereunder (including by merger, reorganization or otherwise) without MIPS' prior written consent. 15.6 CAPTIONS. All Section captions and headings are for reference only and shall not be considered in interpreting or construing this Agreement. 15.7 CONSTRUCTION. This Agreement has been negotiated by the parties, each of which has been represented by counsel. This Agreement will be fairly interpreted in accordance with its terms, without any strict construction in favor or against either party. 15.8 ENGLISH LANGUAGE. The original of this Agreement has been written in English, and such version shall be the governing version of the Agreement. Each party waives any right it may have, if any, under any law or regulation to have this Agreement written in a language other than English. 15.9 SEVERABILITY. If any provision of this Agreement is declared invalid, illegal, or unenforceable by any tribunal, then such provision shall be deemed automatically adjusted to conform to the requirements for validity as declared at such time and, as so adjusted, shall be deemed a provision of this Agreement as though originally included herein. In the event that the provision deemed invalid, illegal or unenforceable is of such a nature that it cannot be so adjusted, the provision shall be deemed deleted from this Agreement as though the provision had never been included herein. If any provision or portion of this Agreement is held to be unenforceable or invalid, the parties agree to negotiate, in good faith, a substitute valid provision which most nearly effects the parties' intent in entering into this Agreement. In either case, the remaining provisions of this Agreement shall remain in full force and effect. WITHOUT LIMITING THE FOREGOING, IT IS EXPRESSLY UNDERSTOOD AND AGREED THAT EACH AND EVERY PROVISION OF THIS AGREEMENT WHICH PROVIDES FOR A LIMITATION OF LIABILITY, DISCLAIMER OF WARRANTY OR EXCLUSION OF DAMAGES IS INTENDED BY THE PARTIES TO BE SEVERABLE AND INDEPENDENT OF ANY OTHER SUCH PROVISION. FURTHER, IN THE EVENT THAT ANY REMEDY HEREUNDER IS DETERMINED TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, ALL LIMITATIONS OF LIABILITY AND EXCLUSIONS OF DAMAGES SHALL REMAIN IN EFFECT. -6- 15.10 INDEPENDENT CONTRACTORS. The parties are each independent contractors and neither party shall be, nor represent itself to be, the franchiser, joint venturer, franchisee, partner, broker, employee, servant, agent, or legal representative of the other party for any purpose whatsoever. 15.11 INJUNCTIVE RELIEF. The parties acknowledge that any breach of the provisions of Sections 2 or 10 of this Agreement may cause irreparable harm and significant injury to an extent that may be extremely difficult to ascertain. Accordingly, each party agrees that the other party will have, in addition to any other rights or remedies available to it at law or in equity, the right to seek injunctive relief to enjoin any breach or violation of such sections. 15.12 FORCE MAJEURE. A party is not liable under this Agreement for non-performance (other than failure to make payments then owing) caused by events or conditions beyond that party's control, if the party makes reasonable efforts to perform. 15.13 COUNTERPARTS. This Agreement and each Technology Schedule may be executed in one or more counter parts, each of which shall constitute an original, but taken together shall constitute one and the same document. A facsimile signature shall have the same force and effect as an original signature. 15.14 PRECEDENCE. In the event of an inconsistency or conflict between the terms and conditions of this Agreement and any term or condition of a Technology Schedule, the term or condition of the Technology Schedule shall prevail and govern with respect to the MIPS Technology licensed pursuant to that Technology Schedule. 15.15 ENTIRE AGREEMENT. This Agreement including its Exhibits contains and constitutes the sole, complete and entire agreement and understanding of the parties concerning the matters contained herein and may not be altered, modified or changed in any manner except by a writing duly executed by the parties. No statements, promises or representations have been made by any party to another, or are relied upon, and no consideration has been or is offered, promised, expected or held out, other than as stated in this Agreement. No party is relying on any representations other than those expressly set forth herein. All prior or contemporaneous discussions and negotiations, whether oral or written, have been, and are, merged and integrated into, and superseded by, this Agreement. IN WITNESS WHEREOF, each party has caused this Agreement to be executed by its duly authorized representative: MIPS TECHNOLOGIES, INC. ITEX, INC. ("License") By: /s/ John Bourgoin 5/30/00 By: /s/ Rich Forte ----------------------------- ---------------------- Print Name: John Bourgoin Print Name: Rich Forte --------------------- -------------- Title: Chairman & C.E.O Title: President C.E.O -------------------------- ------------------- -7- EXHIBIT A TEMPLATE FOR MIPS CORE TECHNOLOGY SCHEDULES The MIPS Core Technology Schedules shall be in the following format: MIPS CORE TECHNOLOGY SCHEDULE FOR THE [INSERT MIPS CORE BEING LICENSED] CORE Licensee desires to license from MIPS and MIPS is willing to license to Licensee the intellectual property associated with the MIPS Core described below subject to the terms and conditions of the Technology License Agreement for MIPS Cores between MIPS and Licensee made to. be effective as of May 30, 2000 (the "LICENSE AGREEMENT") and this MIPS Core Technology Schedule (the "TECHNOLOGY SCHEDULE") to be effective as of May 30, 2000 (the "SCHEDULE EFFECTIVE DATE"). All of the terms and conditions of the License Agreement are incorporated herein and shall apply to this Technology Schedule. Unless otherwise indicated, all capitalized terms shall have the meanings assigned in the License Agreement. 1. LICENSED WPS CORE: Description of Licensed MIPS Core: 2. MIPS DELIVERABLES (including the confidentiality level and Delivery Schedule for each MIPS Deliverable): 3. AUTHORIZED FOUNDRY: 4. LICENSEE APPLICATION: 5. DISTRIBUTION RIGHTS: 6. LICENSE FEES: 6.1 THE INITIAL FEES: 6.2 ADDITIONAL PER USE FEES: 7. ROYALTIES: 8. SUPPORT AND MAINTENANCE FEES: 9. SUPPORT AND MAINTENANCE SERVICES: 10. TERM: 11. PROGRAM MANAGERS: For Licensee: For MIPS: Notice of changes in the above addresses or contacts shall be given in writing in accordance with Section 15.1 of the License Agreement. 12. JOINT PRESS ANNOUNCEMENT: Licensee and MIPS shall jointly announce the existence of the license to the Licensed MIPS Core specified in this Technology Schedule promptly after the Schedule Effective Date, Any such joint announcement shall be mutually agreed upon. -8- 13. ADDITIONAL TERMS: IN WITNESS WHEREOF, each party has caused this Technology Schedule to be executed by its duly authorized representative: MIPS TECHNOLOGIES, INC. ITEX, INC. ("License") By:________________________________ By:______________________________ Print Name:________________________ Print Name:______________________ Title:_____________________________ Title:___________________________ Date:______________________________ Date:____________________________ -9- EXHIBIT B MIPS COMPATIBILITY VERIFICATION PROCESS 1. VERIFICATION TEST SUITE. Licensee must verify each Licensed Hard Core Implementation developed by Licensee pursuant to the license described in Section 2.1 of this Agreement on each process to be used for volume manufacture. For each such Licensed Hard Core Implementation, Licensee shall run the latest verification test suite ("VTS" or "Verification Test Suite") provided by MIPS under the applicable Technology Schedule, without any modification to the VTS, in accordance with the process set forth in Section 2 and/or in Section 3 of this EXHIBIT B. 2. VERIFICATION IF LICENSED HARD CORE IMPLEMENTATION USING FINAL NETLIST. (a) For each Licensed Hard Core Implementation which Licensee desires to verify pursuant to this Section 2 of this EXHIBIT B, Licensee shall run the VTS on the final production version of the layout netlist for such Licensed Hard Core Implementation ("Final Netlist"), instantiated within a test bench provided by MIPS (the "Verification Test Bench"). The Final Netlist instantiated within the Verification Test Bench is referred to herein as the "Netlist Verification Environment." Licensee shall deliver to MIPS a copy of the log resulting from the VTS on the Netlist Verification Environment and any other resulting data ("Netlist Log Results"). (b) In addition to the Netlist Log Results delivered pursuant to Section 2(a), Licensee shall provide MIPS with a copy of the Netlist Verification Environment and any other data required for MIPS to recreate the running of the VTS on the Netlist Verification Environment (collectively, the "Netlist Test Deliverables"). (c) Within thirty (30) days of MIPS' receipt of the Netlist Test Deliverables, MIPS shall review the Netlist Log Results, and at its option, may run the applicable VTS on the Netlist Verification Environment delivered by Licensee and may notify Licensee in writing that the Licensed Hard Core Implementation has passed the compatibility verification process, or that the Licensed Hard Core Implementation has not passed together with details of the failure. In the event that MIPS does not provide such written notification to Licensee within such thirty (30) day period, the Licensed Hard Core Implementation will be deemed to have passed the compatibility verification process. MIPS will give notice that a Licensed Hard Core Implementation has passed only when the Netlist Log Results and MIPS' log results (if any) indicate that no errors have been detected or MIPS agrees to waive any errors detected. 3. VERIFICATION OF LICENSED HARD CORE IMPLEMENTATION USING A TEST CHIP. (a) For each Licensed Hard Core Implementation which Licensee desires to verify pursuant to this Section 3 of this EXHIBIT B, Licensee shall run the VTS on test chips of the Licensed Hard Core Implementation which comply with specifications provided by MIPS under the applicable Technology Schedule ("Test Chips") on a test board approved by MIPS ("Test Board"). A Test Chip on a Test Board is referred to herein as the "Test Chip Verification Environment." Licensee shall deliver to MIPS a copy of the log resulting from running the VTS on the Test Chip Verification Environment and any other resulting data ("Test Chip Log Results") together with a mutually agreed upon number of functional Test Chips (but, in any event, at least ten (10) Chips) which may be used by MIPS without restriction. (b) In addition to the Test Chip Log Results and Test Chips delivered pursuant to Section 3(a), Licensee shall provide MIPS with a copy of the Test Chip Verification Environment and any other data required for MIPS to recreate the running of the VTS on the Test Chip Verification Environment (collectively, the "Test Chip Test Deliverables"). (c) Within thirty (30) days of MIPS' receipt of the Test Chip Test Deliverables, MIPS shall review the Test Chip Log Results, and, at its option, may run the applicable VTS on the Test Verification Environment delivered by Licensee and may notify Licensee in writing that the Licensed Hard Core Implementation has passed the compatibility verification process, or that the Licensed Hard Core Implementation has not passed together with details of the failure. In the event that MIPS does not provide such written notification to Licensee within such thirty (30) day period, the Licensed Hard Core Implementation will be deemed to have passed the compatibility verification process. MIPS will give notice that a Licensed Hard Core Implementation has passed only when the Test Chip Log Results and MIPS' log results (if any) indicate that no errors have been detected or MIPS agrees to waive any errors detected. 4. TESTS ON LICENSEE CHIPS. Licensee shall run the VTS, or shall perform Licensee `s normal and reasonable test procedure for Licensee Chips ("Normal Licensee Test Procedure"), on each unit of each Licensee Chip that is manufactured for Licensee. Licensee will notify MIPS of the details of the Normal License Test Procedure, and will reasonable consider comments from MIPS about such procedure. 5. PROHIBITIONS ON USE OF THE VTS AND VERIFICATION ENVIRONMENT. The VTS, Netlist Verification Environment and Test Chip Verification Environment, or any portion or derivative thereof, may not be used to test or verify core designs other than Licensed Hard Core Implementations developed in accordance with this Agreement and the applicable Technology Schedule. -10- EXHIBIT C APPROVAL FORM TO: MIPS Technologies, Inc.("MIPS") FROM: _____________________ ATTN: Program Manager AT:________________________("Licensee") Fax No.: (650) 567-5150 FAX NO.:___________________ (Please provide fax number to which MIPS should respond) The Licensee identified above requests approval from MIPS in accordance with the terms and conditions of the Technology License Agreement __ MIPS Cores effective as of ____________, 200_ by and between MIPS and Licensee (the "License Agreement") to use the third party identified below for the purpose identified below or hereby provides notice to MIPS as set forth below. [ ] The following foundry shall be included as an Authorized Foundry for purposes of the MIPS Core Technology Schedule for the ______________ Core, effective as of ______________, 200_ entered into MIPS and Licensee pursuant to the terms of the License Agreement: ____________________________________ Foundry Name Address:____________________________ ____________________________________ ____________________________________ Country:____________________________ ____________________________________ Contact Name Tel./Fax.:__________________________ Email:______________________________ [ ] The following third party shall be an approved contractor to be used by Licensee in exercising its [ ] "have developed" rights under Subsection 2.1.1 of the License Agreement, or [ ] "internally develop" or "internally design" rights under Subsection 2.1.1 or 2.1.2 as permitted under Section 2.2 with respect to the MIPS Core licensed to Licensee pursuant to the MIPS Core Technology Schedule for the _________________________ Core, effective as of _______________ 200_ entered into by MIPS and Licensee pursuant to the terms of the License Agreement: _____________________________________ Third Party Contractor Address:_____________________________ _____________________________________ _____________________________________ Country:_____________________________ Tel./Fax.:___________________________ Email:_______________________________ Nature of work to be performed: _____________________________________ _____________________________________ _____________________________________ [ ] The following Licensee Chip has been commenced as of ____________________, 200_ using the version of MIPS Deliverables as set forth below: Licensee Chip:______________________ ____________________________________ ____________________________________ Version of MIPS Deliverables: Version:____________________________ APPROVED AND ACCEPTED: MIPS Technologies, Inc. By:_______________________________ Name:_____________________________ Title:____________________________ Date:_____________________________ -11- EXHIBIT D TRADEMARK LICENSE AGREEMENT This Trademark License Agreement ("Agreement") is entered into to be effective as of May 30, 2000 (the "EFFECTIVE Day") by and between MIPS Technologies, Inc., a Delaware corporation, with its principal place of business at 1225 Charleston Avenue, Mountain View, California 94043-1353 ("MIPS") and ITeX, Inc., a Delaware corporation with its principal place of business at 2710 Walsh Avenue, Santa Clara, California 95051 ("License"). BACKGROUND MIPS and Licensee have entered into a Technology License Agreement for MIPS Cores effective on even date herewith ("LICENSE AGREEMENT"). This Trademark License Agreement is incorporated into the License Agreement as an exhibit thereto. MIPS is the owner of various registered and unregistered trademarks, logos and brand names associated with MIPS ("MIPS MARKS"). Licensee would like to use, pursuant to the terms and conditions of this Trademark License Agreement (including the Attachment hereto), certain MIPS Marks in connection with Licensee Products (as defined below). In consideration of the premises and the mutual promises and covenants contained herein and in the License Agreement, the parties agree as follows: 1. DEFINITIONS. All capitalized terms not separately defined in this Trademark License Agreement have the meanings set forth in the License Agreement. "LICENSED MARK(S)" shall mean, subject to Section 6.2, the MIPS Marks set forth in Attachment I hereto, which may be amended from time to time by mutual written agreement. "LICENSEE PRODUCT" shall mean any Licensee Chip as defined in the License Agreement, when manufactured, marketed and distributed in accordance with the License Agreement. "PROMOTIONAL MATERIALS" shall mean promotional materials, including but not limited to (i) labels on external packaging or otherwise, (ii) sales literature and other collateral material, (iii) product data sheets and other technical documentation, and (iv) advertising, communications and public relations materials. "TERRITORY" shall mean worldwide, except as modified pursuant to Section 2.2. "USAGE GUIDELINES" shall mean MIPS' then-current Corporate Identity and Trademark Usage Guidelines, which may be obtained by Licensee from MIPS' marketing department or MIPS' web site. 2. GRANT OF LICENSE. 2.1 GRANT. Subject to the terms and conditions of this Trademark License Agreement, MIPS hereby grants to Licensee the right and license to use the Licensed Marks, solely in accordance with the Usage Guidelines and solely within the Territory, on Licensee Products and in Promotional Materials relating to Licensee Products. 2.2 TERRITORY. MIPS may eliminate any country from the Territory if MIPS determines in its sole judgment that use of any Licensed Mark in such country may subject MIPS to legal liability, or may put MIPS' rights in the Licensed Mark(s) at risk in such country, and Licensee shall promptly commence actions to cease all use, and thereafter shall expeditiously cease all use, of the Licensed Marks in such country upon written notice from MIPS. 2.3 EXCLUSIVITY. The license set forth in Section 2.1 shall be exclusive with respect to those Licensed Marks, if any, listed in Section of Attachment 1, and shall be nonexclusive with respect to all other Licensed Marks. 2.4 SUBLICENSES. Licensee may sublicense, to its customers or to third party manufacturers of Licensee Products that Licensee is permitted to use under the License Agreement, only those Licensed Marks which are expressly identified in Attachment 1 as sublicensable. All such sublicenses shall require the sublicensee to fully comply with the terms and conditions of this Agreement (excluding Section 3), and shall identify MIPS as a third party beneficiary of the sublicense agreement. 2.5 LIMITATIONS. Except as set forth in Section 204, Licensee shall have no right to sublicense the Licensed Marks. Except as expressly set forth in this Trademark License Agreement, MIPS reserves all rights in the MIPS Marks. Licensee's license to use the Licensed Marks applies only to the Licensed Marks exactly as set forth in Attachment 1, and does not extend to any modified or derived versions of the Licensed Marks, including but not limited to sequentially larger or smaller, or otherwise related, numbers. 2.6 SPECIMENS. Licensee agrees to supply MIPS with specimens of Licensee's uses of the Licensed Marks, upon MIPS' reasonable request in connection with MIPS' maintenance and protection of Licensed Marks. 3. JOINT OR COOPERATIVE PROMOTION. 3.1 IDENTIFICATION OF LICENSEE PRODUCTS. Licensee agrees to identify each Licensee Product as "MIPS-based(TM)" in Licensee's Promotional Materials for such Licensee Product. 3.2 JOINT OR COOPERATIVE PROMOTION. Upon mutual agreement, each party shall designate an employee as its "Co-Marketing Program Manager." During the term of this Trademark License Agreement, Licensee will use reasonable efforts to share with MIPS any information with respect to the Licensed Marks that it obtains through market research or otherwise and reasonably believes may affect MIPS' business strategy with respect to the subject matter of the License Agreement or this Trademark License Agreement. The Co-Marketing Program Managers shall discuss, share information regarding, and be responsible for coordinating, joint or cooperative promotional activities, including without limitation: (i) the development and implementation of mutually beneficial co-branding and co-marketing programs to promote the Licensed Marks and the Licensee Products; and (ii) the identification and exploitation of opportunities to undertake such joint or cooperative promotional activities, including without limitation the discussion of pending announcements for each Licensee Product, as each of the following phases of the worldwide market introduction process for such Licensee Product: assessment of product positioning in the market, readiness of product, development of an integrated communication strategy and plan, creation of an introduction plan, and actual introduction of the Licensee Product. To further the promotion of the Licensed Marks and the Licensee Products, Licensee may provide to MIPS copies of Licensee's Promotional Materials for the Licensee Products. MIPS will make a good faith effort to review such materials. 4. QUALITY CONTROL AND PRODUCT STANDARDS. Licensee agrees that the Licensee Products and associated Promotional Materials shall conform to a high standard in the industry, and shall be of such appearance and quality as to protect the prestige of the Licensed Marks and the goodwill pertaining thereto; that Licensee Products will be manufactured and distributed in accordance with all applicable laws and regulations and without violating the rights of any third parties; and that Licensee Products will not reflect adversely on the good name of MIPS. Licensee shall use the Licensed Marks in connection with Licensee Products only if the Licensee Products meet or exceed the standards of performance and quality historically set by -12- Licensee or its affiliates for similar goods and services. In the event that MIPS at any time funds that any Licensee Products provided under the Licensed Marks, or any advertisements or promotions thereof, are not in accordance with standards of quality acceptable to MIPS, are misleading or deceptive, or in any way reflect negatively on the image of MIPS, then upon written notification by MIPS< senior management of mips and licensee shall meet and discuss the deficiencies identified by mips, and licensee shall thereafter rectify such deficiencies in a manner agreed upon by the senior management of both parties. 5. rights to mips marks. licensee acknowledges that, as between the parties, all rights throughout the world associated with the mips marks, including the licensed marks, and all goodwill attached thereto, belong exclusively to mips. licensee agrees that the mips marks are the sole and exclusive property of mips, and that any and all uses by licensee of the licensed marks shall inure to the benefit of mips. upon mips' reasonable request and at mips' expense licensee agrees to assist mips in recording this trademark license agreement with appropriate governmental authorities. licensee shall not, during or after the term of this trademark license agreement, act in any manner which would impair mips' ownership of the mips marks. 6. terms and termination. 6.1 terms. the term of this trademark license agreement shall commence on the effective date and shall terminate upon the expiration or termination of the license agreement, unless this trademark license agreement is terminated sooner for material breach or otherwise as provided herein. 6.2 termination. if either party fails to perform or violates any material obligation under this trademark license agreement, then upon thirty (30) days written notice to the breaching party specifying such default (the "default notice"), the non-breaching party may terminate this trademark license agreement with respect to all licensed marks, or with respect to the specific licensed marks affected by the default, without liability, unless the breach specified in the default notice has been cured within the thirty (30) day period. 6.3 survival. sections 5, 6.3, 8 and 9 shall survive the expiration or termination of this agreement. in addition, in the event that this trademark license agreement terminates upon the expiration or termination of the license agreement, the provisions of this trademark license agreement shall survive with respect to a licensee product if and to the extent that the surviving terms of the license agreement permit licensee to continue to market and distribute such licensee product. 7. trademark enforcement. licensee agrees to notify mips of any unauthorized use of any licensed mark promptly after it comes to licensee's attention, and to assist mips, at mips' reasonable request and expense, in prosecuting any claim against any third party involving the licensed marks. licensee shall, at mips' request and expense, reasonably assist mips in mips' efforts to secure registration and/or enforcement of any licensed mark. 8. disclaimer. mips does not make any warranties under this trademark license agreement, and expressly disclaims all warranties, whether express, statutory, or implied, regarding the mips marks or the licensed marks, including without limitation the implied warranties of merchantability, fitness for a particular purpose, title and noninfringement of third party rights. 9. except for breach of section 2 (license grant), neither party shall be liable to the other for any incidental, consequential, special, or punitive damages of any kind or nature arising out of this agreement, whether such liability is asserted on the basis of contract, tort (including negligence or strict liability), or otherwise, even if the party has been warned of the possibility of any such loss or damage in advance. 10. general terms and conditions. 10.1 incorporation by reference. the provisions of sections 15.1 through 15.13 of the license agreement are hereby incorporated into, and made a part of, this trademark license agreement. 10.2 entire agreement. this trademark license agreement, including any attachment hereto, constitutes the entire agreement of the parties concerning its subject matter, and may not be modified except by a writing duly executed by both parties. all prior discussions, drafts and negotiations regarding such subject matter are merged and integrated into, and superseded by, this trademark license agreement. in the event of any inconsistency between the terms of the license agreement (including all exhibits and attachments thereto) and the terms of this trademark license agreement with regard to the subject matter of this trademark license agreement, the terms of this trademark license agreement shall control. in witness whereof, the parties hereto have caused this trademark license agreement to be executed by their duly authorized officers to be effective as of the effective date. mips technologies, inc. itex, inc. by: /s/ john bourgoin 5/30/00 by: /s/ rich forte ------------------------------ ---------------------- print name: john bourgoin print name: rich forte ---------------------- -------------- title: chairman & c.e.o title: president c.e.o --------------------------- ------------------- -13- ATTACHMENT 1 To the Trademark License Agreement LICENSED MARKS
1. EXCLUSIVE. LICENSED MARK SUBLICENSABLE? None Not applicable 2. NONEXCLUSIVE. LICENSED MARK SUBLICENSABLE? MIPS(R) Not Applicable MIPS-based(TM) Not Applicable MIPS[*](TM) Not Applicable
CO-MARKETING PROGRAM MANAGERS FOR MIPS: [*] FOR LICENSEE: TBD [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -14- EXHIBIT E COVENANT NOT TO SUE To preserve MIPS' ability to continue to update, enhance, develop and commercialize the MIPS Technology, Licensee hereby perpetually and irrevocably (both during and after the term of this Agreement) agrees that Licensee and its affiliates will not enforce or assert their Intellectual Property Rights in any modifications or derivative works of the Licensed MIPS Core developed pursuant to the license described in Section 2 against, in connection with, or in a manner which in any way limits, hampers or prevents, the use, design, development, modification, enhancement, testing, copying, and licensing or other distribution, by MIPS or its distributors, resellers, OEMS, agents, customers, licensees (through multiple tiers of licensing and sublicensing) or end users in any country, of (i) MIPS Cores, MIPS ISAs and other MIPS Technology, tools, physical implementations of MIPS Core designs and MIPS ISAS, and (ii) other products incorporating or using MIPS Technology. The parties acknowledge and agree that the foregoing covenant not to sue will not apply to Licensee's enforcement of its intellectual property rights in Licensee's proprietary circuit and other technology incorporated in Licensee Chips, provided that such technology's functionality is independent of the MIPS Core incorporated in such Licensee Chips, and provided that such technology was developed independently by Licensee without use of the MIPS Technology. The parties further acknowledge and agree that the foregoing covenant not to sue will not apply to licensees of MIPS Cores, MIPS ISAs or other MIPS Technology or products if such licensees have not signed a covenant not to sue which extends to Licensee and which is substantially similar to MIPS' then-current standard covenant not to sue for the MIPS Core, MIPS ISA or other MIPS Technology or products licensed by such licensee. Licensee agrees that this EXHIBIT E is not confidential, and may be freely disclosed by MIPS to third parties. AGREED AND ACCEPTED: ITEX, INC. ("LICENSEE") By: /s/ Rich Forte Print Name: Rich Forte Title: President-C.E.O Date: 5/30/00 -15- MIPS CORE TECHNOLOGY SCHEDULE FOR THE MIPS[*] CORE Licensee desires to license from MIPS and MIPS is willing to license to Licensee the intellectual property associated with the MIPS Core described below subject to the terms and conditions of the Technology License Agreement for MIPS Cores between MIPS and Licensee made to be effective as of May 30, 2000 (the "LICENSE AGREEMENT") and this MIPS Core Technology Schedule for the MIPS[*] Core (the "[*] Core Technology Schedule") to be effective as of May 30, 2000 (the "SCHEDULE EFFECTIVE DATE"). All of the terms and conditions of the License Agreement are incorporated herein and shall apply to this [*] Technology Schedule. Unless otherwise indicated, all capitalized terms shall have the meanings assigned in the License Agreement. 1. LICENSED MIPS CORE: MIPS[*](TM) [*](TM) Description of Licensed MIPS Core: The MIPS[*] processor core has the following characteristics: - Based on MIPS[*](TM)architecture - [*] - Functional components: - Register file - Write Buffer [*] - ALU & shifter - Bus interface unit - Branch Control Unit - [*] unit - [*] Multiply/divide unit - [*] - [*] unit - [*] multiply operations - [*]-bit data busses The MIPS[*] shall substantially conform to the specifications as set forth in the MIPS[*] Processor Core Datasheet. Any material nonconformity in the MIPS[*] processor core must be reported to MIPS in writing within thirty (30) days from the receipt thereof. Upon receipt of written notice, MIPS shall use reasonable efforts to correct such material nonconformity and deliver the corrected MIPS[*] processor core to Licensee or replace the same. The foregoing sets out Licensee's sole and exclusive remedy for any nonconformity in the MIPS[*] processor core. 2. MIPS DELIVERABLES (INCLUDING THE CONFIDENTIALITY LEVEL AND DELIVERY SCHEDULE FOR EACH MIPS DELIVERABLE): The MIPS Deliverables are provided electronically as a bundle. The version of the MIPS[*] bundle to be delivered is VERSION [*].
- ------------------------------------------------------------------------------------------------------------------------------------ RESTRICTED INTERNAL EXTERNAL DELIVERABLE CONFIDENTIAL CONFIDENTIAL CONFIDENTIAL COMMERCIAL DELIVERY DATE - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Documentation - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- MIPS[*] Processor Core Family v Within 1 week of signing Implementor's Guide agreement MIPS[*] Processor Core Family v Within 1 week of signing Integrator's Guide agreement MIPS[*] Processor Core Family v(1) Within 1 week of signing Software User's Manual agreement MIPS[*] Errata v Within 1 week of signing agreement
[*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -1-
- ------------------------------------------------------------------------------------------------------------------------------------ RESTRICTED INTERNAL EXTERNAL DELIVERABLE CONFIDENTIAL CONFIDENTIAL CONFIDENTIAL COMMERCIAL DELIVERY DATE - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- MIPS[*] Data Sheet v(1) Within 1 week of signing agreement [*] Specification v Within 1 week of signing agreement [*] Specification v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Design Data - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Verilog RTL for [*] Core, VERSION [*] v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Configuration Tools - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Configuration GUI tool v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synthesis Support - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synopsys design Compiler shell scripts v(2) Within 1 week of signing agreement Mentor scan insertion and ATPG scripts v(2) Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Simulation Models - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Encrypted cycle-accurate simulation model v Within 1 week of signing agreement Bus-functional model v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Simulation Support - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Build and run scripts for [*] Core v(2) Within 1 week of signing agreement Simulation and verification test bench RTL v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Verification Suite - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Memory image for [*] Core v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Timing Analysis - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Primetime template, pre-and post-layout v(2) Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Power Analysis - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synopsys Design Power Scripts for [*] Core v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- ---------------------------
(1) Licensee's customer may not modify or distribute. (2) Licensee may modify as necessary to support chip development. 3. AUTHORIZED FOUNDRY: The following foundry is an Authorized Foundry: United Microelectronics Corporation (UMC). Upon written approval from MIPS which will not be unreasonably withheld (Exhibit C attached to the License Agreement may be used for this purpose), additional foundries may be added as an "Authorized Foundry" at any time during the term of this [*] Core Technology Schedule. Licensee acknowledges that it will only deliver the complete GDSII tape or a full maskwork of the Licensee Chip to the Authorized Foundries. 4. LICENSEE APPLICATION: Licensee Chips are being designed for the following applications: communication. 5. DISTRIBUTION RIGHTS: Licensee may distribute Licensee Chips as packaged integrated circuits only. 6. LICENSE FEES: 6.1 THE INITIAL FEES: Upon execution of this [*] Core Technology Schedule by both parties, Licensee shall pay MIPS a nonrefundable license fee of $[*] (an "Initial License Fee") in consideration for acquiring the license rights set forth in Section 2 of the License Agreement for the first Licensee Chip, which Initial License Fee is due and payable upon execution of this [*] Core Technology Schedule by both parties. The parties acknowledge that the first Licensee Chip is intended to be a DSL SOC chip. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -2- 6.2 ADDITIONAL PER USE FEES: In addition to the Initial License Fee, Licensee shall pay MIPS a nonrefundable license fee of $[*] in consideration for acquiring the license rights set forth in Section 2 of the License Agreement for each New License Chip (each, a "Per Use Fee"), which Per Use Fee shall be due and payable upon the first Tapeout of such New Licensee Chip. A Licensee Chip shall be considered to be a "New Licensee Chip" unless it (i) is the first Licensee Chip Taped Out as provided for in Section 5.1 above, or (ii) has been derived from a Licensee Chip which has previously been Taped Out by making only error corrections or process shrinks, where the features and functionality do not change. After Licensee has paid MIPS under Sections 6.1, 6.2 and 8 below a total of $[*] ("[*] Core Cap"), no more additional Per Use Fees will be due for each New Licensee Chip Taped Out during the Term of this [*] Core Technology Schedule. Licensee shall provide MIPS with written notification in the form of a purchase order of each New Licensee Chip developed by Licensee no later than the first Tapeout of each such New Licensee Chip. 7. ROYALTIES: Licensee shall pay MIPS a nonrefundable royalty for each Licensee Chip sold. pursuant to this [*] Core Technology Schedule equal to a percentage (as indicated below) of the Net Revenue received by Licensee from the sale of each such unit multiplied by the "Ratio"(as defined below); which royalty shall vary as the total cumulative number of units of Licensee Chips sold increases as set forth below, which total cumulative number of units of Licensee Chips shall include Licensee Chips sold pursuant to this [*] Core Technology Schedule and/or the Technology Schedules for the MIPS[*] Core and MIPS[*] Core if entered into by Licensee pursuant to the option set forth in Section 13 below; provided, however, that the royalty paid for each Licensee Chip shall in no event be less than the royalty floor set forth below or be greater than the royalty ceiling set forth below, which royalty floor and ceiling shall vary as the total cumulative number of units of Licensee Chips sold increases as set forth below, and provided further, that the royalty paid for each Licensee Chip shall in no event be less than such royalty floor set forth below multiplied by a multiplier as set forth below, which multiplier shall vary as the total number of instantiations of a MIPS Core incorporated in the Licensee Chip increases as set forth below:
Unit Volume % of Net Revenue Floor Ceiling ----------- ---------------- ----- ------- [*] [*]% $[*] $[*] [*] [*]% $[*] $[*] [*] [*]% $[*] $[*] [*] [*]% $[*] $[*]
The royalty floor set forth above shall be multiplied by the multiplier set forth below depending upon the number of instantiations of a MIPS Core incorporated in the Licensee Chip:
Number of MIPS Cores Incorporated Multiplier --------------------------------- ---------- In the licensee chip -------------------- [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*]
In the event that two or more types of Licensed MIPS Cores are incorporated in the same Licensee Chip, the royalty floors and ceilings shall be determined by multiplying the royalty floor or ceiling, as applicable, for the [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -3- highest priced Licensed MIPS Core incorporated in the Licensee Chip by the Multiplier (as set forth above) for the total number of instantiations of Licensed MIPS Cores incorporated in the Licensee Chip. "Ratio" is defined as the ratio of total silicon area attributable to each MIPS Core to the total silicon area of the Licensee Chip, excluding any cache memory, other on-chip memory, and pad rings. The royalty calculation with respect to volume tiers shall be determined as per the actual date of shipment of Licensee Chip. 8. SUPPORT AND MAINTENANCE FEES: In addition to the Initial License Fees and Per Use Fees, for each twelve (12) month period commencing on the anniversary of the Schedule Effective Date, Licensee shall pay MIPS a maintenance and support fee of $[*] for the [*] Core Technology Schedule prior to the commencement of such twelve (12) month period, except that, in the event Licensee enters into Technology Schedules for the MIPS[*] Core and/or for the MIPS[*] Core pursuant to the option set forth in Section 13 below, the total maintenance and support fee for such twelve (12) month period under this [*] Technology Schedule together with such other Technology Schedules shall be $[*] if [*] Technology Schedules for [*] cores have been entered into and $[*] if [*] Technology Schedules for [*] cores have been entered into. During the Initial Term, the maintenance and support fee for the [*] Core shall be accrued toward the [*] Core Cap (as defined in Section 6.2 above). 9. SUPPORT AND MAINTENANCE SERVICES: MIPS -will provide support in connection with the MIPS Deliverables during the first year of this [*] Core Technology Schedule. In addition, MIPS will provide support in any twelve (12) month period commencing on ail anniversary of the Schedule Effective Date, provided that Licensee has paid the annual maintenance and support fee referred to in Section 8 above for such twelve (12) month period, and has paid the applicable annual maintenance and support fees for all preceding such twelve (12) month periods (other than the initial twelve (12) month period after the Schedule Effective Date). ATTACHMENT A to this [*] Core Technology Schedule details MIPS' maintenance and support obligations. 10. TERM: 10.1 INITIAL TERM. The initial term of this [*] Core Technology Schedule ("INITIAL TERM"), shall begin on the Schedule Effective Date and, unless earlier terminated, shall continue for a period of four (4) years. 10.2 RENEWALS. After the expiration of the Initial Term, unless earlier terminated pursuant to the License Agreement this [*] Core Technology Schedule may be renewed by Licensee for up to five (5) additional consecutive one (1) year terms ("Renewal Terms"); provided in order to renew for each such one (1) year Renewal Term, Licensee must have paid NETS the Initial License Fees and all Per Use Fees, maintenance and support fees, and accrued royalties due and payable pursuant to, Sections 6, 7 and 8 of this [*] Core Technology Schedule and have paid the applicable support and maintenance fees for such Renewal Tenn. 11. PROGRAM MANAGERS: For Licensee: TBD For MIPS: [*] Notice of changes in the above addresses or contacts shall be given in writing in accordance with Section 15.1 of the License Agreement. 12. ADDITIONAL TERMS: Joint Press Announcement: Licensee and MIPS shall jointly announce the existence of the license to the Licensed MTS Core specified in this [*] Core Technology Schedule promptly after the Schedule Effective Date. Any such joint announcement shall be mutually agreed upon, [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -4- 13. ADDITIONAL TERMS: 13.1 OPTION TO LICENSE [*] AND/OR [*]) CORES WITHIN [*] YEARS FROM LICENSING THE [*] CORE. Subject to the terms and conditions of the License Agreement MIPS grants Licensee an option (the "Option") for a period of [*] years from the Schedule Effective Date of this [*] Core Technology Schedule (the "Option Exercise Period") to license two additional cores, the MIPS[*] Core and the MIPS[*] Core, under the terms of the separate Technology Schedules attached hereto as OPTION SCHEDULES 1 AND 2, respectively, as they may be updated by MIPS with respect to MIPS Deliverables made generally available for such cores; provided MIPS is still making such cores generally available for license.. In the event Licensee desires to exercise the Option during the Option Exercise Period Licensee shall notify MIPS of its intent to exercise the Option by providing written notice to MIPS (the "Option Exercise Notice") which notice shall identify the core or cores Licensee desires to license and an exercise target date within the Option Exercise Period. Promptly upon receipt of such Option Exercise Notice, MIPS shall prepare and forward the updated Technology Schedule(s), as applicable. Exercise of the Option with respect to a particular core will occur upon execution by the parties of the Technology Schedule applicable to that Core. IN WITNESS WHEREOF, each party has caused this [*] Core Technology Schedule to be executed by its duty authorized representative: MIPS TECHNOLOGIES, INC ITEX, INC. ("LICENSEE") By: /s/ John Bourgoin By: /s/ Rich Forte --------------------------- ------------------------- Print Name: John Bourgoin Print Name: Rich Forte ------------------- ----------------- Title: Chairman & C.E.O Title: President ------------------------- --------------------- Date: 5/30/00 Date: 5/30/00 -------------------------- ----------------------- [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -5- ATTACHMENT A to the Technology Schedule for the MIPS[*] Core MIPS SUPPORT AND MAINTENANCE PROGRAM MAINTENANCE OF LICENSED MIPS CORE: - - MIPS will provide updates made generally available by MIPS to similar licensees of the Licensed MIPS Core, and to the deliverables listed in the [*] Core Technology Schedule. - - MIPS will provide bug fixes made generally available by MIPS to similar licensees of the Licensed MIPS Core, and to the deliverables listed in the [*] Core Technology Schedule. - - Updates and bug fixes will be distributed- when generally available from MIPS. At MIPS sole discretion, a limited number of updates and/or bug fixes may be distributed prior to general availability in order to assure the quality and applicability of the update and/or bug fix. TECHNICAL SUPPORT: - MIPS will assign a Technical Support Program Manager as the contact person for technical support for the Licensed MIPS Core(s) and deliverables listed in the [*] Core Technology Schedule. - MIPS will provide guidance on system environment and methodology, for using the Licensed MIPS Core(s) and deliverables list in the [*] Core Technology Schedule. - MIPS will address questions regarding interfaces to the Licensed MIPS Core(s) and compatibility verification testing of the Licensed MIPS Core(s). - One (1) SEAD board will be provided when made available by MIPS as part of the first year maintenance and support at no additional charge. - A 2-day training on the architecture of the licensed MIPS core will be provided as part of the first year maintenance and support at no additional charge. - If Licensee has purchased a Reference Board, MIPS will provide Technical Support for the board, the board firmware, and documentation. Support for Third Party software (e.g, real-time operating systems, etc.) shall be provided by the Third Party. - MIPS will provide Technical Support via telephone and/or email, and support will be directed to the Licensee contact person. - MIPS will provide phone and email support on the MIPS deliverables listed in the [*] Core Technology Schedule and on the items listed in this Attachment. Support is limited to [*] hours per [*] month period. - Additional support hours are available from MIPS in 10-hour bundles charged at MIPS, standard support rates. Support rates for the first [*] months of this [*] Core Technology Schedule shall not exceed $[*] per hour. - Technical Support time will be charged per minute, with a minimum of 15 minutes charged per Technical Support Incident. An Incident is defined as a single Technical Support event that may take several Licensee contacts to resolve. A single Licensee report request may result in multiple Incidents. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -6- - MIPS will respond to Technical Support requests within [*] hours of request, [*]-hour response shall be limited to regular working days, weekends and US and Denmark business holidays excluded. Response time is not the time required to resolve the problem. - MIPS will provide a case number for all Technical Support Incidents. - MIPS will provide weekly status updates to the Licensee and to the MIPS account manager for all Technical Support Incidents open for over [*] working days, - Escalation of Technical Support Incidents open more than [*] business days is available at the Licensee's request, The Licensee may request review and escalation of the unresolved Incident through the Licensee's account manager, the Technical Support Program Manager, or through MIPS' Director of Support and Services. Licensee and MIPS shall work to resolve the escalated Incident. Licensee acknowledges the complex technical nature of CPU cores and understands that some support requests, by their nature take indeterminate time to resolve. - All Technical Support requests are logged in a support database used for Technical Support quality assurance. QUALITY ASSURANCE: The Technical Program Manager will hold a customer support review meeting at least [*] per year during each year that support and maintenance is provided, in order to review performance, and address issues that have been raised. MIPS shall agree to additional meetings, or waiver of these. meetings, at Licensee's reasonable request, and MIPS will not unreasonably withhold its approval of these requests. Attendees will be the MIPS Business Account Manager, the Technical Program Manager and the customer's representative(s). Feedback coming from the customer during this forum, on his experience of working with MIPS will be presented to MIPS senior management. ENGINEERING SERVICES: Services not provided by Maintenance and Technical Support are available from MIPS Technologies from MIPS Engineering Services organization. Under a separate Statement of Work (SOW) signed by MIPS and the Licensee and contracted via Purchase Order, NIPS may provide the following services at the Engineering Services rates in effect when the SOW and Purchase Order are agreed upon. All services are charged for time and materials and travel (if applicable) only. Examples of these services are: - Support in tailoring of the MIPS deliverables to the Licensee's own design flow. - Support of the Licensee during the core hardening stage of development. - Support in the integration and interface of the core within the Licensee's System on Chip. - MIPS software expert guidance which may include assistance with: - Optimization - Exception handlers - Memory Mapping Issues [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -7- - Boot code - EJTAG usage - Help in the "bring-up" of the customer's SOC in the customer's system board. - Guidance in MIPS core related issues during the system level verification phase of development. -8- OPTION SCHEDULE 1 to the Technology Schedule for the MIPS[*] Core MIPS CORE TECHNOLOGY SCHEDULE FOR THE MIPS[*] CORE Licensee desires to license from MIPS and MIPS is willing to license to Licensee the intellectual property associated with the MIPS Core described below subject to the terms and conditions of the Technology License Agreement for MIPS Cores between MIPS and Licensee made to be effective as of May 30,2000 (the "License Agreement") and this MIPS Core Technology Schedule for the MIPS[*] Core (the "[*] Core Technology Schedule") to be effective as of __________, 200_ (the "Scheduled Effective Date"). All of the terms and conditions of the License Agreement are incorporated herein and shall apply to the [*] Core Technology Schedule. Unless otherwise indicated, all capitalized terms shall have the meanings assigned in the License Agreement. 1. LICENSED MIPS CORE: MIPS[*](TM) [*](TM) Description of Licensed MIPS Core: The MIPS [*] processor core has the following characteristics: - Based on MIPS[*](TM)architecture - [*] - Functional components: - Write Buffer [*] - Register file - Bus interface unit - ALU & shifter - [*] unit - Branch Control Unit - [*] - [*] Multiply/divide unit - [*] multiply operations - [*] unit - [*]-bit data busses The MIPS[*] shall substantially conform to the specifications as set forth in the MIPS[*] Processor Core Datasheet. Any material nonconformity in the MIPS[*] processor core must be reported to MIPS in writing within thirty (30) days from the receipt thereof. Upon receipt of written notice, MIPS shall use reasonable efforts to correct such material nonconformity and deliver the corrected MIPS[*] processor core to Licensee or replace the same. The foregoing sets out Licensee's sole and exclusive remedy for any nonconformity in the MIPS[*] processor core. 2. MIPS DELIVERABLES (INCLUDING. THE CONFIDENTIALITY LEVEL AND DELIVERY SCHEDULE FOR EACH MIPS DELIVERABLE): The MIPS Deliverables are provided electronically as a bundle. The version of the MIPS[*] bundle to be delivered is VERSION [*].
- ------------------------------------------------------------------------------------------------------------------------------------ RESTRICTED INTERNAL EXTERNAL DELIVERABLE CONFIDENTIAL CONFIDENTIAL CONFIDENTIAL COMMERCIAL DELIVERY DATE - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Documentation - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- MIPS[*] Processor Core Family v Within 1 week of signing Implementor's Guide agreement MIPS[*] Processor Core Family v Within 1 week of signing Integrator's Guide agreement MIPS[*] Processor Core Family v(1) Within 1 week of signing Software User's Manual agreement
[*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -9-
- ------------------------------------------------------------------------------------------------------------------------------------ RESTRICTED INTERNAL EXTERNAL DELIVERABLE CONFIDENTIAL CONFIDENTIAL CONFIDENTIAL COMMERCIAL DELIVERY DATE - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- MIPS[*] Errata v Within 1 week of signing agreement MIPS[*] Data Sheet v(1) Within 1 week of signing agreement EJTAG Specification v Within 1 week of signing agreement EC Interface Specification v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Design Data - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Verilog RTL for [*] Core, VERSION [*] v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Configuration Tools - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Configuration GUI tool v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synthesis Support - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synopsys Design Compiler shell scripts v(2) Within 1 week of signing agreement Mentor scan insertion and ATPG scripts v(2) Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Simulation Models - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Encrypted cycle-accurate simulation model v Within 1 week of signing agreement Bus-functional model v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Simulation Support - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Build and run scripts for [*] Core v(2) Within 1 week of signing agreement Simulation and verification test bench RTL v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Verification Suite - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Memory image for [*] Core v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Timing Analysis - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Primetime template, pre-and post-layout v(2) Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Power Analysis - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synopsys Design Power Scripts for [*] Core v(2) Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- ---------------------------
(1) Licensee's customer may not modify or distribute. (2) Licensee may modify as necessary to support chip development. 3. AUTHORIZED FOUNDRY: The following foundry is an Authorized Foundry: United Microelectronics Corporation (UMC). Upon written approval from MIPS which will riot be unreasonably withheld (Exhibit C attached to the License Agreement may be used for this purpose), additional foundries may be added as an "Authorized Foundry" at any time during the term of this [*] Core Technology Schedule. Licensee ` acknowledges that it will only deliver the complete GDSII tape or a full maskwork of the Licensee Chip to the Authorized-Foundries. 4. LICENSEE APPLICATION: Licensee Chips are being designed for the following applications: _________________________________. 5. DISTRIBUTION RIGHTS: Licensee may distribute Licensee Chips as packaged integrated circuits only. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -10- 6. LICENSE FEES: 6.1 THE INITIAL FEES: Licensee shall pay MIPS a nonrefundable license fee of $[*] (an "Initial License Fee") in consideration for acquiring the license rights set forth in Section 2 of the License Agreement for the first Licensee Chip, which Initial License Fee is due and payable upon execution of this [*] Core Technology Schedule by both parties, !he parties acknowledge that the first Licensee Chip is intended to be a _________________________________. 6.2 ADDITIONAL PER USE FEES: In addition to the Initial License fee, Licensee shall pay MIPS a nonrefundable license fee of $[*] in consideration for acquiring the license rights set forth in Section 2 of the License Agreement for each New Licensee Chip (each, a "Per Use Fee"), which Per Use Fee shall be due and payable upon the first Tapeout of such New Licensee Chip. A Licensee Chip shall be considered to be a "New Licensee Chip" unless it (i) is the first Licensee Chip Taped Out as provided for in Section 6.1 above, or (ii) has been derived from a Licensee Chip which has previously been Taped Out by making only error corrections or process shrinks, where the features and functionality do not change, In the event that Licensee has reached the [*] Core Cap (as defined in the [*] Core Technology Schedule), the cap for the [*] Core shall be $[*], provided, however, if Licensee has not reached the [*] Core Cap, the cap for the [*] Core shall be $[*]. Notwithstanding the above, the combined cap for the [*] Core, [*] Core and [*] Core shall be $[*]. Licensee shall provide MIPS with written notification in the form of a Purchase order of each New Licensee Chip developed by Licensee no later. than the first Tapeout of each such New Licensee Chip. 7. ROYALTIES: Licensee shall pay MIPS a nonrefundable royalty for each Licensee Chip sold pursuant to this [*] Core Technology Schedule equal to a percentage (as indicated below) of the Net Revenue received by Licensee from the sale of each such unit multiplied by the "Ratio" (as defined below); which royalty shall vary as the total cumulative number of units of Licensee Chips sold increases as set forth below, which total cumulative number of units of Licensee Chips shall include Licensee Chips sold pursuant to this [*] Core Technology Schedule and Technology Schedules for the [*] Core and/or the [*] Core entered into by the parties, if applicable; provided, however, that the royalty paid for each Licensee Chip shall in no event be less than the royalty floor set forth below or be greater than the royalty ceiling set forth below, which royalty floor and ceiling shall vary as the total cumulative number of units of Licensee Chips sold increases as set forth below, and provided further, that the royalty paid for each Licensee Chip shall in no event be less than such royalty floor set forth below multiplied by a multiplier as set forth below, which multiplier shall vary as the total number of instantiations of a MIPS Core incorporated in the Licensee Chip increases as set forth below:
Unit Volume % of Net Revenue Floor Ceiling ----------- ---------------- ----- ------- [*] [*]% $[*] $[*] [*] [*]% $[*] $[*] [*] [*]% $[*] $[*] [*] [*]% $[*] $[*]
The royalty floor set forth above shall be multiplied by the multiplier set forth below depending upon the number of instantiations of a MIPS Core incorporated in the Licensee Chip;
Number of MIPS Cores Incorporated Multiplier --------------------------------- ---------- In the Licensee Chip -------------------- [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*] [*]
[*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -11-
Number of MIPS Cores Incorporated Multiplier --------------------------------- ---------- In the Licensee Chip -------------------- [*] [*]
In the event that two or more types of Licensed MIPS Cores are incorporated in the same Licensee Chip, the royalty floors and ceilings shall be determined by multiplying the royalty floor or ceiling, as applicable, for the highest priced Licensed MIPS Core incorporated in the Licensee Chip by the Multiplier (as set forth above) for the total number of instantiations of Licensed MIPS Cores incorporated in the Licensee Chip. "Ratio" is defined as the ratio of total silicon area attributable to each MIPS Core to the total silicon area of the Licensee Chip, excluding any cache memory, other on-chip memory, and pad rings. The royalty calculation with respect to volume tiers shall be determined as per the actual date of shipment of Licensee Chip. 8. SUPPORT AND MAINTENANCE FEES: In addition to the Initial License Fees and Per Use Fees, for each twelve (12) month period commencing on the anniversary of the Schedule Effective Date, Licensee shall pay MIPS a maintenance and support fee prior to the commencement of such twelve (12) month period, The maintenance and support fee shall be $[*] for one Technology Schedule for [*] core, $[*] for [*] Technology Schedules for [*] cores, and $[*] for [*] Technology Schedules for [*] cores. The support and maintenance fee for the MIPS[*] Core will be prorated for the remainder of the period commencing on the first anniversary of the license of the MIPS[*] core and ending on the date of the next anniversary date of the license of the MIPS[*] Core. Thereafter, the support and maintenance fees for all applicable cores shall be payable upon the commencement of the anniversary date of the license of the MIPS[*] Core, During the Initial Term, the maintenance and support fee for the [*] Core shall be accrued toward the applicable cap for the [*] Core. 9. SUPPORT AND MAINTENANCE SERVICES: MIPS will provide support in connection with the MIPS Deliverables during the first year of this Technology Schedule. In addition, MIPS will provide support in any twelve (12) month period commencing on an anniversary of the Schedule Effective Date, provided that Licensee has paid the annual maintenance and support fee referred to in Section 8 above for such twelve (12) month period, and has paid the applicable annual maintenance and support fees for all preceding such twelve (12) month periods (other than the initial twelve (12) month period after the Schedule Effective Date). Attachment A to this [*] Core Technology Schedule details MIPS' maintenance and support obligations. 10. TERM: 10.1 INITIAL TERM. The initial term of this Technology Schedule ("Initial Term"), shall begin on the Schedule Effective Date and, unless earlier. terminated, shall continue for a period of four (4) years. 10.2 RENEWALS. After the expiration of the initial Term, unless earlier terminated pursuant to the License Agreement, this [*] Core Technology Schedule may be renewed by Licensee for up to five (5) additional consecutive one (1) year terms ("Renewal Terms"); provided in order to renew for each such one (1) year Renewal Term, Licensee must have paid MIPS the Initial License Fees and all Per Use, Fees, maintenance and support fees, and accrued royalties due and payable pursuant to Sections 6, 7 and 8 of this [*] Core Technology Schedule and have paid the applicable support and maintenance fees for such Renewal Term. 11. PROGRAM MANAGERS: For Licensee: TBD For MIPS: [*] Notice of changes in the above addresses or contacts shall be given in writing in accordance with Section 15.1 of the License Agreement. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -12- 12. JOINT PRESS ANNOUNCEMENT: Licensee and MIPS shall jointly announce the existence of the license to the Licensed MIPS Core specified in this [*] Core Technology Schedule promptly after the Schedule Effective Date. Any such joint announcement shall be mutually agreed upon. 13. ADDITIONAL TERMS: None. IN WITNESS WHEREOF, each party has caused this [*] Core Technology Schedule to be executed by its duly authorized representative: MIPS TECHNOLOGIES, INC ITEX, INC. ("LICENSEE") By: _______________________________ By: ____________________________ Print Name: ________________________ Print Name: ____________________ Title: _____________________________ Title: _________________________ Date: ______________________________ Date: __________________________ [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -13- ATTACHMENT A to the Technology Schedule for the MIPS[*] Core MIPS SUPPORT AND MAINTENANCE PROGRAM MAINTENANCE OF LICENSED MIPS CORE: - MIPS will provide updates made generally available by MIPS to similar licensees of the Licensed MIPS Core, and to the deliverables listed in the Technology Schedule. - MIPS will provide bug fixes made generally available by MIPS to similar licensees of the Licensed MIPS Core, and to the deliverables listed in the Technology Schedule. - Updates and bug fixes will be distributed when generally available from MIPS. At MIPS' sole discretion, a limited number of updates and/or bug fixes may be distributed prior to general availability in order to assure the quality and applicability of the update and/or bug fix. TECHNICAL SUPPORT: - MIPS will assign a Technical Support Program Manager as the contact person for technical support for the Licensed MIPS Core(s) and deliverables listed in the Technology Schedule. - MIPS will provide guidance on system environment and methodology for using the Licensed MIPS Core(s) and deliverables list in the Technology Schedule. - MIPS will address questions regarding interfaces to the Licensed MIPS Core(s) and compatibility verification testing of the Licensed MIPS Core(s). - If Licensee has purchased a Reference Board, MIPS will provide Technical Support for the board, the board firmware, and documentation. Support for Third Party software (e.g, real-time operating systems, etc.) shall be provided by the Third Party. - MIPS will provide Technical Support via telephone and/or email, and support will be directed to the Licensee contact person. - MIPS will provide phone and email support on the MIPS deliverables listed in the Technology Schedule and on the items listed in this Attachment. Support is limited to [*] hours per [*] month period. - Additional support hours are available from MIPS in 10-hour bundles charged at MIPS' standard support rates. Support rates for the first [*] months of this [*] Core Technology Schedule shall not exceed $[*] per hour. - Technical Support time will be charged per minute, with a minimum of 15 minutes charged per Technical Support Incident. An Incident is defined as a single Technical Support event that may take several Licensee contacts to resolve. A single Licensee report request may result in multiple Incidents. - MIPS will respond to Technical Support requests within [*] hours of request. [*]-hour response shall be limited to regular working days, weekends and US and Denmark business holidays excluded. Response time is not the time required to resolve the problem. - MIPS will provide a case number for all Technical Support Incidents. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -14- - MIPS will provide weekly status updates to the Licensee and to the MIPS account manager for all Technical Support Incidents open for over [*] working days. - Escalation of Technical Support Incidents open more than [*] business days is available at the Licensee's request. The Licensee may request review and escalation of the unresolved Incident through the Licensee's account manager, the Technical Support Program Manager, or through MIPS' Director of Support and Services. Licensee and MIPS shall work to resolve the escalated Incident. Licensee acknowledges the complex technical nature of CPU cores and understands that some support requests, by their nature, take indeterminate time to resolve. - All Technical Support requests are logged in a support database used for Technical Support quality assurance. QUALITY ASSURANCE: The Technical Program Manager will hold a customer support review meeting at least [*] per year during each year that support and maintenance is provided, in order to review performance, and address issues that have been raised. MIPS shall agree to additional meetings, or waiver of these meetings, at Licensee's reasonable request, and MIPS will not unreasonably withhold its approval of these requests. Attendees will be the MIPS Business Account Manager, the Technical Program Manager and the customer's representative(s). Feedback coming from the customer during this forum, on his experience of working with MIPS will be presented to MIPS senior management. ENGINEERING SERVICES: Services not provided by Maintenance and Technical Support are available from MIPS Technologies from MIPS Engineering Services organization. Under a separate Statement of Work (SOW) signed by MIPS and the Licensee and contracted via Purchase Order, MIPS may provide the following services at the Engineering Services rates in effect when the SOW and Purchase Order are agreed upon. All services are charged for time and materials and travel (if applicable) only. Examples of these services are: - Support in tailoring of the MIPS deliverables to the Licensee's own design flow. - Support of the Licensee during the core hardening stage of development. - Support in the integration and interface of the core within the Licensee's System on Chip. - MIPS software expert guidance which may include assistance with: - Optimization - Exception handlers - Memory Mapping Issues - Boot code - EJTAG usage - Help in the "bring-up" of the customer's SOC in the customer's system board. - Guidance in MIPS core related issues during the system level verification phase of development. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -15- OPTION SCHEDULE 2 to the Technology Schedule for the MIPS[*] Core MIPS CORE TECHNOLOGY SCHEDULE FOR THE MIPS[*] CORE Licensee desires to license from MIPS and MIPS is willing to license to Licensee the intellectual property associated with the MIPS Core described below subject to the terms and conditions of the Technology License Agreement for MIPS Cores between MIPS and Licensee made to be effective as of May 30, 2000 (the "LICENSE AGREEMENT") and this MIPS Core Technology Schedule for the MIPS[*] Core (the "[*] Core Technology Schedule") to be effective as of __________, 200_ (the "SCHEDULED EFFECTIVE DATE"). All of the terms and conditions of the License Agreement are incorporated herein and shall apply to this [*] Core Technology Schedule. Unless otherwise indicated, all capitalized terms shall have the meanings assigned in the License Agreement. 1. LICENSED MIPS CORE: MIPS[*](TM) [*](TM) Description of Licensed MIPS Core: The MIPS[*] processor core has the following characteristics: - Based on MIPS[*](TM)architecture [*] - Functional components: - Write Buffer [*] - Register file - Bus interface unit - ALU & shifter - [*] unit - Branch Control Unit - [*] - [*] Multiply/divide unit - [*] multiply operations - [*] unit - [*]-bit data busses The MIPS[*] shall substantially conform to the specifications as set forth in the MIPS[*] Processor Core Datasheet. Any material nonconformity in the MIPS[*] processor core must be reported to MIPS in writing within thirty (30) days from the receipt thereof. Upon receipt of written notice, MIPS shall use reasonable efforts to correct such material nonconformity and deliver the corrected MIPS[*] processor core to Licensee or replace the same. The foregoing sets out Licensee's sole and exclusive remedy for any nonconformity in the MIPS[*] processor core. 2. MIPS DELIVERABLES (INCLUDING. THE CONFIDENTIALITY LEVEL AND DELIVERY SCHEDULE FOR EACH MIPS DELIVERABLE): The MIPS Deliverables are provided electronically as a bundle. The version of the MIPS[*] bundle to be delivered is version [*].
- ------------------------------------------------------------------------------------------------------------------------------------ RESTRICTED INTERNAL EXTERNAL DELIVERABLE CONFIDENTIAL CONFIDENTIAL CONFIDENTIAL COMMERCIAL DELIVERY DATE - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Documentation - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- MIPS[*] Processor Core Family v Within 1 week of signing Implementor's Guide agreement MIPS[*] Processor Core Family v Within 1 week of signing Integrator's Guide agreement MIPS[*] Processor Core Family v1 Within 1 week of signing Software User's Manual agreement
[*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -16-
- ------------------------------------------------------------------------------------------------------------------------------------ RESTRICTED INTERNAL EXTERNAL DELIVERABLE CONFIDENTIAL CONFIDENTIAL CONFIDENTIAL COMMERCIAL DELIVERY DATE - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- MIPS[*] Errata v Within 1 week of signing agreement MIPS[*] Data Sheet v1 Within 1 week of signing agreement EJTAG Specification v Within 1 week of signing agreement EC Interface Specification v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Design Data - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Verilog RTL for [*] Core, VERSION [*] v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Configuration Tools - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Configuration GUI tool v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synthesis Support - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synopsys Design Compiler shell scripts v(2) Within 1 week of signing agreement Mentor scan insertion and ATPG scripts v(2) Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Simulation Models - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Encrypted cycle-accurate simulation model v Within 1 week of signing agreement Bus-functional model v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Simulation Support - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Build and run scripts for [*] Core v(2) Within 1 week of signing agreement Simulation and verification test bench RTL v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Verification Suite - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Memory image for [*] Core v Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Timing Analysis - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Primetime template, pre-and post-layout v(2) Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Power Analysis - ------------------------------------------------ ------------- ------------ ------------ ---------- --------------------------- Synopsys Design Power Scripts for [*] Core v(2) Within 1 week of signing agreement - ------------------------------------------------ ------------- ------------ ------------ ---------- ---------------------------
(1) Licensee's customer may not modify or distribute. (2) Licensee may modify as necessary to support chip development. 3. AUTHORIZED FOUNDRY: The following foundry is an Authorized Foundry: United Microelectronics Corporation (UMC). Upon written approval from MIPS which will riot be unreasonably withheld (Exhibit C attached to the License Agreement may be used for this purpose), additional foundries may be added as an "Authorized Foundry" at any time during the term of this [*] Core Technology Schedule. Licensee ` acknowledges that it will only deliver the complete GDSII tape or a full maskwork of the Licensee Chip to the Authorized-Foundries. 4. LICENSEE APPLICATION: Licensee Chips are being designed for the following applications: ____________________________________. 5. DISTRIBUTION RIGHTS: Licensee may distribute Licensee Chips as packaged integrated circuits only. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -17- 6. LICENSE FEES: 6.1 THE INITIAL FEES: Licensee shall pay MIPS a nonrefundable license fee of $[*] (an "Initial License Fee") in consideration for acquiring the license rights set forth in Section 2 of the License Agreement for the first Licensee Chip, which Initial License Fee is due and payable upon execution of this [*] Core Technology Schedule by both parties, !he parties acknowledge that the first Licensee Chip is intended to be a _________________________________. 6.2 ADDITIONAL PER USE FEES: In addition to the Initial License fee, Licensee shall pay MIPS a nonrefundable license fee of $[*] in consideration for acquiring the license rights set forth in Section 2 of the License Agreement for each New Licensee Chip (each, a "Per Use Fee"), which Per Use Fee shall be due and payable upon the first Tapeout of such New Licensee Chip. A Licensee Chip shall be considered to be a "New Licensee Chip" unless it (i) is the first Licensee Chip Taped Out as provided for in Section 6.1 above, or (ii) has been derived from a Licensee Chip which has previously been Taped Out by making only error corrections or process shrinks, where the features and functionality do not change, In the event that Licensee has reached the [*] Core Cap (as defined in the [*] Core Technology Schedule), the cap for the [*] Core shall be $[*], provided, however, if Licensee has not reached the [*] Core Cap, the cap for the [*] Core shall be $[*]. Notwithstanding the above, the combined cap for the [*] Core, [*] Core and [*] Core shall be $[*]. Licensee shall provide MIPS with written notification in the form of a Purchase order of each New Licensee Chip developed by Licensee no later. than the first Tapeout of each such New Licensee Chip. 7. ROYALTIES: Licensee shall pay MIPS a nonrefundable royalty for each Licensee Chip sold pursuant to this [*] Core Technology Schedule equal to a percentage (as indicated below) of the Net Revenue received by Licensee from the sale of each such unit multiplied by the "Ratio" (as defined below); which royalty shall vary as the total cumulative number of units of Licensee Chips sold increases as set forth below, which total cumulative number of units of Licensee Chips shall include Licensee Chips sold pursuant to this [*] Core Technology Schedule and Technology Schedules for the [*] Core and/or the [*] Core entered into by the parties, if applicable; provided, however, that the royalty paid for each Licensee Chip shall in no event be less than the royalty floor set forth below or be greater than the royalty ceiling set forth below, which royalty floor and ceiling shall vary as the total cumulative number of units of Licensee Chips sold increases as set forth below, and provided further, that the royalty paid for each Licensee Chip shall in no event be less than such royalty floor set forth below multiplied by a multiplier as set forth below, which multiplier shall vary as the total number of instantiations of a MIPS Core incorporated in the Licensee Chip increases as set forth below:
Unit Volume % of Net Revenue Floor Ceiling ----------- ---------------- ----- ------- [*] [*]% $[*] $[*] [*] [*]% $[*] $[*] [*] [*]% $[*] $[*] [*] [*]% $[*] $[*]
The royalty floor set forth above shall be multiplied by the multiplier set forth below depending upon the number of instantiations of a MIPS Core incorporated in the Licensee Chip:
Number of MIPS Cores Incorporated Multiplier --------------------------------- ---------- In the Licensee Chip -------------------- [*] [*]
In the event that two or more types of Licensed MIPS Cores are incorporated in the same Licensee Chip, the royalty floors and ceilings shall be determined by multiplying the royalty floor or ceiling, as applicable, for the highest priced Licensed MIPS Core incorporated in the Licensee Chip by the Multiplier (as set forth above) for the total number of instantiations of Licensed MIPS Cores incorporated in the Licensee Chip. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -18- "Ratio" is defined as the ratio of total silicon area attributable to each MIPS Core to the total silicon area of the Licensee Chip, excluding any cache memory, other on-chip memory, and pad rings. The royalty calculation with respect to volume tiers shall be determined as per the actual date of shipment of Licensee Chip. 8. SUPPORT AND MAINTENANCE FEES: In addition to the Initial License Fees and Per Use Fees, for each twelve (12) month period commencing on the anniversary of the Schedule Effective Date, Licensee shall pay MIPS a maintenance and support fee prior to the commencement of such twelve (12) month period, The maintenance and support fee shall be $[*] for one Technology Schedule for [*] core, $[*] for [*] Technology Schedules for [*] cores, and $[*] for [*] Technology Schedules for [*] cores. The support and maintenance fee for the MIPS[*] Core will be prorated for the remainder of the period commencing on the first anniversary of the license of the MIPS[*] core and ending on the date of the next anniversary date of the license of the MIPS[*] Core. Thereafter, the support and maintenance fees for all applicable cores shall be payable upon the commencement of the anniversary date of the license of the MIPS[*] Core, During the Initial Term, the maintenance and support fee for the [*] Core shall be accrued toward the applicable cap for the [*] Core. 9. SUPPORT AND MAINTENANCE SERVICES: MIPS will provide support in connection with the MIPS Deliverables during the first year of this [*] Core Technology Schedule. In addition, MIPS will provide support in any twelve (12) month period commencing on an anniversary of the Schedule Effective Date, provided that Licensee has paid the annual maintenance and support fee referred to in Section 8 above for such twelve (12) month period, and has paid the applicable annual maintenance and support fees for all preceding such twelve (12) month periods (other than the initial twelve (12) month period after the Schedule Effective Date). ATTACHMENT A to this [*] Core Technology Schedule details MIPS' maintenance and support obligations. 10. TERM: 10.1 INITIAL TERM. The initial term of this [*] Core Technology Schedule ("INITIAL TERM"), shall begin on the Schedule Effective Date and, unless earlier. terminated, shall continue for a period of four (4) years. 10.2 RENEWALS. After the expiration of the initial Term, unless earlier terminated pursuant to the License Agreement, this [*] Core Technology Schedule may be renewed by Licensee for up to five (5) additional consecutive one (1) year terms ("Renewal Terms"); provided in order to renew for each such one (1) year Renewal Term, Licensee must have paid MIPS the Initial License Fees and all Per Use, Fees, maintenance and support fees, and accrued royalties due and payable pursuant to Sections 6, 7 and 8 of this [*] Core Technology Schedule and have paid the applicable support and maintenance fees for such Renewal Term. 11. PROGRAM MANAGERS: For Licensee: TBD For MIPS: [*] Notice of changes in the above addresses or contacts shall be given in writing in accordance with Section 15.1 of the License Agreement. 12. JOINT PRESS ANNOUNCEMENT: Licensee and MIPS shall jointly announce the existence of the license to the Licensed MIPS Core specified in this [*] Core Technology Schedule promptly after the Schedule Effective Date. Any such joint announcement shall be mutually agreed upon. 13. ADDITIONAL TERMS: None. IN WITNESS WHEREOF, each party has caused this [*] Core Technology Schedule to be executed by its duly authorized representative: [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -19- MIPS TECHNOLOGIES, INC ITEX, INC. ("LICENSEE") By: _____________________________ By: ____________________________ Print Name: ______________________ Print Name: ____________________ Title: ___________________________ Title: _________________________ Date: ____________________________ Date: __________________________ [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -20- ATTACHMENT A to the Technology Schedule for the MIPS[*] Core MIPS SUPPORT AND MAINTENANCE PROGRAM MAINTENANCE OF LICENSED MIPS CORE: - MIPS will provide updates made generally available by MIPS to similar licensees of the Licensed MIPS Core, and to the deliverables listed in the Technology Schedule. - MIPS will provide bug fixes made generally available by MIPS to similar licensees of the Licensed MIPS Core, and to the deliverables listed in the Technology Schedule. - Updates and bug fixes will be distributed when generally available from MIPS. At MIPS' sole discretion, a limited number of updates and/or bug fixes may be distributed prior to general availability in order to assure the quality and applicability of the update and/or bug fix. TECHNICAL SUPPORT: - MIPS will assign a Technical Support Program Manager as the contact person for technical support for the Licensed MIPS Core(s) and deliverables listed in the Technology Schedule. - MIPS will provide guidance on system environment and methodology for using the Licensed MIPS Core(s) and deliverables list in the Technology Schedule. - MIPS will address questions regarding interfaces to the Licensed MIPS Core(s) and compatibility verification testing of the Licensed MIPS Core(s). - If Licensee has purchased a Reference Board, MIPS will provide Technical Support for the board, the board firmware, and documentation. Support for Third Party software (e.g, real-time operating systems, etc.) shall be provided by the Third Party. - MIPS will provide Technical Support via telephone and/or email, and support will be directed to the Licensee contact person. - MIPS will provide phone and email support on the MIPS deliverables listed in the Technology Schedule and on the items listed in this Attachment. Support is limited to [*] hours per [*] month period. - Additional support hours are available from MIPS in 10-hour bundles charged at MIPS' standard support rates. Support rates for the first 12 months of this [*] Core Technology Schedule shall not exceed $[*] per hour. - Technical Support time will be charged per minute, with a minimum of 15 minutes charged per Technical Support Incident. An Incident is defined as a single Technical Support event that may take several Licensee contacts to resolve. A single Licensee report request may result in multiple Incidents. - MIPS will respond to Technical Support requests within [*] hours of request. [*]-hour response shall be limited to regular working days, weekends and US and Denmark business holidays excluded. Response time is not the time required to resolve the problem. - MIPS will provide a case number for all Technical Support Incidents. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -21- - MIPS will provide weekly status updates to the Licensee and to the MIPS account manager for all Technical Support Incidents open for over [*] working days. - Escalation of Technical Support Incidents open more than 10 business days is available at the Licensee's request. The Licensee may request review and escalation of the unresolved Incident through the Licensee's account manager, the Technical Support Program Manager, or through MIPS' Director of Support and Services. Licensee and MIPS shall work to resolve the escalated Incident. Licensee acknowledges the complex technical nature of CPU cores and understands that some support requests, by their nature, take indeterminate time to resolve. - All Technical Support requests are logged in a support database used for Technical Support quality assurance. QUALITY ASSURANCE: The Technical Program Manager will hold a customer support review meeting at least [*] per year during each year that support and maintenance is provided, in order to review performance, and address issues that have been raised. MIPS shall agree to additional meetings, or waiver of these meetings, at Licensee's reasonable request, and MIPS will not unreasonably withhold its approval of these requests. Attendees will be the MIPS Business Account Manager, the Technical Program Manager and the customer's representative(s). Feedback coming from the customer during this forum, on his experience of working with MIPS will be presented to MIPS senior management. ENGINEERING SERVICES: Services not provided by Maintenance and Technical Support are available from MIPS Technologies from MIPS Engineering Services organization. Under a separate Statement of Work (SOW) signed by MIPS and the Licensee and contracted via Purchase Order, MIPS may provide the following services at the Engineering Services rates in effect when the SOW and Purchase Order are agreed upon. All services are charged for time and materials and travel (if applicable) only. Examples of these services are: - Support in tailoring of the MIPS deliverables to the Licensee's own design flow. - Support of the Licensee during the core hardening stage of development. - Support in the integration and interface of the core within the Licensee's System on Chip. - MIPS software expert guidance which may include assistance with: - Optimization - Exception handlers - Memory Mapping Issues - Boot code - EJTAG usage - Help in the "bring-up" of the customer's SOC in the customer's system board. - Guidance in MIPS core related issues during the system level verification phase of development. [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -22- AMENDMENT TO TECHNOLOGY LICENSE AGREEMENT FOR MIPS CORES This Amendment to Technology License Agreement for MIPS Cores (the "Amendment") is made as of June 7,2000, by and between MIPS TECHNOLOGIES, INC., a Delaware corporation, with a principal place of business at 1225 Charleston Road, Mountain View, California 94043 ("MIPS") and INTEGRATED TELECOM EXPRESS, INC., a Delaware corporation, with a principal place of business at 2710 Walsh Avenue, Santa Clara, California 95051 ("Licensee"). WITNESSETH Whereas, MIPS and Licensee are parties to the Technology License Agreement for MIPS Cores dated May 30, 2000, and MIPS Core Technology Schedule for the MIPS[*] Core dated May 30, 2000 (collectively, the "Agreement"); and Whereas, MIPS and Licensee desire to amend the Agreement. NOW, THEREFORE, for all good and valuable consideration, the receipt and sufficiency of which is hereby acknowledged, MIPS and Licensee hereby agree as follows: 1. "Itex, Inc." shall be amended and restated as "Integrated Telecom Express, Inc." throughout the Agreement. 2. Except as expressly amended or modified herein, all other terms and conditions of the Agreement continue unmodified and remain in full force and effect. In the event of any conflict between the terms and conditions contained in the Agreement and in this Amendment, the terms and conditions of this Amendment shall control. IN WITNESS WHEREOF, MIPS and Licensee have executed this Amendment as of the day and year first above written. MIPS TECHNOLOGIES, INC. INTEGRATED TELECOM EXPRESS, INC. ("LICENSEE") By: /s/ Derek Meyer By: /s/ Max Liu ------------------------------- -------------------------------------- Name: Derek Meyer Name: Max Liu ----------------------------- ------------------------------------ Title: World Wide Field Operations Title: VP, Technology & Adv. Architecture ---------------------------- ----------------------------------- [*] CERTAIN INFORMATION ON THIS PAGE HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION. CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS. -1-