Cadence Design Systems Bonus & Incentive Agreements
25 Contracts & Agreements
- Form of Restricted Stock Unit Agreement for Non-Executive Employees and Consultants, as currently in effect under the Registrant's Omnibus Equity Incentive Plan (Filed With SEC on October 23, 2023)
- Form of Incentive Stock Award Agreement for Non-Executive Employees and Consultants, as currently in effect under the Registrant's Omnibus Equity Incentive Plan (Filed With SEC on October 23, 2023)
- Form of Restricted Stock Unit Agreement for Non-Executive Employees and Consultants, as currently in effect under the Registrants Omnibus Equity Incentive Plan (Filed With SEC on October 24, 2022)
- Form of Incentive Stock Award Agreement for Non-Executive Employees and Consultants, as currently in effect under the Registrants Omnibus Equity Incentive Plan (Filed With SEC on October 24, 2022)
- Form of Restricted Stock Unit Agreement for Non-Executive Employees and Consultants, as currently in effect under the Registrants Omnibus Equity Incentive Plan (Filed With SEC on February 22, 2021)
- Form of Incentive Stock Award Agreement for Non-Executive Employees and Consultants, as currently in effect under the Registrants Omnibus Equity Incentive Plan (Filed With SEC on February 22, 2021)
- The Registrants Senior Executive Bonus Plan (Filed With SEC on February 8, 2019)
- CADENCE DESIGN SYSTEMS, INC. SENIOR EXECUTIVE BONUS PLAN (Filed With SEC on July 25, 2016)
- CADENCE DESIGN SYSTEMS, INC. SENIOR EXECUTIVE BONUS PLAN (Filed With SEC on February 18, 2016)
- Cadence Design Systems, Inc. Incentive Stock Award Agreement 1995 Directors Stock Incentive Plan (Filed With SEC on February 21, 2013)
- Cadence Design Systems, Inc. Non-Qualified Stock Option Agreement 1995 Directors Stock Incentive Plan (Filed With SEC on February 21, 2013)
- CADENCE DESIGN SYSTEMS, INC. 1995 DIRECTORS STOCK INCENTIVE PLAN Amended and Restated May 4, 2012 (approved by stockholders) (Filed With SEC on July 26, 2012)
- CADENCE DESIGN SYSTEMS, INC. NONSTATUTORY STOCK OPTION AGREEMENT INITIAL GRANT Amended and Restated 2000 Equity Incentive Plan (Plan) (Filed With SEC on October 28, 2011)
- CADENCE DESIGN SYSTEMS, INC. RESTRICTED STOCK UNIT AWARD AGREEMENT Amended and Restated 2000 Equity Incentive Plan (Filed With SEC on October 28, 2011)
- Form of Incentive Stock Award Agreement for performance-based Incentive Stock Awards as currently in effect under the Cadence Design Systems, Inc. 1987 Stock Incentive Plan, as... (Filed With SEC on February 13, 2006)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
- Encounter RTL Compiler, featuring global synthesis for timing closure, which uses a patented set of global focus algorithms that maximize circuit performance (Filed With SEC on April 2, 2004)
